From 53978e8b097fb7a13988ce652fd249047661daca Mon Sep 17 00:00:00 2001 From: AI Dev Date: Tue, 27 Oct 2026 11:45:46 +0000 Subject: [PATCH 1/2] fh: pad mux for FH8852/FH8856/FH8858, V100, V200 and V210 Fullhan detection never set chip_generation, so every ipchw_padmux_* call on a Fullhan board answered IPCHW_PADMUX_NO_CHIP. That left no way to put a pad such as GPIO9 back to GPIO. On a Tenda IC7-L (FH8852V200 + GC4653) the IR-cut coils are on GPIO9/GPIO10, which boot as SSI0_D2/D3, and the filter only moved after "mux,GPIO9,GPIO9,0" was written to /proc/driver/pinctrl by hand (OpenIPC/majestic#354). The layout is HiSilicon's: one register per pad at 0xF0000080 + 4*pad (board.c: fh_pinctrl_init(VA_PMU_REG_BASE + 0x80)), selector in bits 24..27 (mfs). It is the same on V100 and V200/V210. - tools/gen_fh_padmux.py turns the vendor kernel's iopad.h (PINCTRL_FUNC(name, pad, FUNCn, ...)) into src/hal/fh_padmux.h, from OpenIPC/linux fullhan-fh8852v200@ee1ef844 and fullhan-fh8852v100@4825e16e. It proves that the six V200/V210 chips share one table and the two V100 chips another, and it refuses duplicate selectors, a selector wider than four bits, a pad with two GPIOs, or a GPIO on two pads. - src/hal/fh_padmux.c is the backend. A pad is addressed by its GPIO number (pad 46 is GPIO9), never by pad id, and "5_2" is refused. A write sets the selector plus the input, output and Schmitt enables, as the kernel's fh_pinctrl_func_select() does. func_mask covers all four bits; get() decodes the selector alone. - fh_detect_cpu() sets a CHIP_FH* chip_generation. FH8856V201 and FH8858V201 are recognised and answer NO_TABLE. ## Boot-flash lines On V200, GPIO7..GPIO10 are also SSI0_TXD, SSI0_RXD, SSI0_D2 and SSI0_D3, and SSI0 is the SPI controller the board runs from. Neither the table nor the hardware says which lines a board's flash uses. On the Tenda, the input enable reads set on every pad and the output enable reads clear on every pad, even right after the kernel's own mux. - A new optional backend hook, in_use(), lets Fullhan answer true for any pad currently carrying an SSI0_* function. - ipchw_padmux_set() then returns the new IPCHW_PADMUX_IN_USE and writes nothing. Re-selecting the function the pad already carries is allowed. - ipchw_padmux_set_forced() and `gpio mux --force` are for whoever knows the board, such as an owner who has named that pad for something else. ## Build and tests - CMake family "fh", dropped like xm when the Fullhan HAL is not selected. padmux_names regenerated. - reginfo_test: FH8852V200 and FH8852V100 are in the integrity sweep, which now uses the forced call because it cycles every pad through every function. test_fh() checks the GPIO9 values from that camera: pad 46, SSI0_D2 at selector 0, register 0xF0000138. Not yet run on a camera beyond that board's /proc/driver/pinctrl dump. The register reads and writes are host-tested against a fake register file only. --- CMakeLists.txt | 11 +- docs/padmux.md | 51 +- include/ipchw.h | 10 + src/hal/fh.c | 11 + src/hal/fh.h | 16 + src/hal/fh_padmux.c | 243 +++++++++ src/hal/fh_padmux.h | 482 ++++++++++++++++ src/hal/fh_padmux_types.h | 23 + src/padmux.c | 33 +- src/padmux.h | 11 + src/padmux_names.c | 544 ++++++++++++++++++- src/padmux_names.h | 1088 +++++++++++++++++++++++++++++++++++-- src/reginfo.c | 34 +- src/reginfo_test.c | 88 ++- tools/gen_fh_padmux.py | 194 +++++++ tools/gen_padmux_names.py | 1 + 16 files changed, 2752 insertions(+), 88 deletions(-) create mode 100644 src/hal/fh_padmux.c create mode 100644 src/hal/fh_padmux.h create mode 100644 src/hal/fh_padmux_types.h create mode 100644 tools/gen_fh_padmux.py diff --git a/CMakeLists.txt b/CMakeLists.txt index 6a8cea68..931fa0bb 100644 --- a/CMakeLists.txt +++ b/CMakeLists.txt @@ -72,7 +72,7 @@ endif() # Same shape as IPCHW_VENDORS above, and for the same reason -- set(... CACHE) # here means a parent project has to FORCE it. set(IPCHW_PADMUX_FAMILIES v1 v2 v2a v3 v3a v4 v4a v5 3536c 3536d sstar - ingenic novatek xm) + ingenic novatek xm fh) set(IPCHW_PADMUX "all" CACHE STRING "Pad-mux tables compiled into libipchw: 'all', 'none', or a subset of ${IPCHW_PADMUX_FAMILIES}") @@ -107,6 +107,11 @@ if("xm" IN_LIST _padmux_selected AND NOT "xm" IN_LIST _ipchw_selected) list(REMOVE_ITEM _padmux_selected xm) list(REMOVE_ITEM IPCHW_PADMUX_DEFS IPCHW_PADMUX_XM) endif() +# Fullhan's likewise: only hal/fh.c sets the chip_generation that reaches it. +if("fh" IN_LIST _padmux_selected AND NOT "fh" IN_LIST _ipchw_selected) + list(REMOVE_ITEM _padmux_selected fh) + list(REMOVE_ITEM IPCHW_PADMUX_DEFS IPCHW_PADMUX_FH) +endif() message(STATUS "libipchw pad-mux tables: ${_padmux_selected}") # The vendors whose pad-mux is its own backend rather than a table in @@ -116,13 +121,13 @@ message(STATUS "libipchw pad-mux tables: ${_padmux_selected}") # SigmaStar tables in a build that detects nothing else, which is exactly what # reginfo_test does. set(IPCHW_PADMUX_BACKENDS "") -foreach(_f sstar ingenic novatek xm) +foreach(_f sstar ingenic novatek xm fh) if(_f IN_LIST _padmux_selected) list(APPEND IPCHW_PADMUX_BACKENDS src/hal/${_f}_padmux.c) endif() endforeach() set(IPCHW_PADMUX_BACKENDS_ALL src/hal/sstar_padmux.c src/hal/ingenic_padmux.c - src/hal/novatek_padmux.c src/hal/xm_padmux.c) + src/hal/novatek_padmux.c src/hal/xm_padmux.c src/hal/fh_padmux.c) # Which HiSilicon generations libipchw can identify. IPCHW_VENDORS does not # reach the CODE: chipid.c dispatches to the HiSilicon HAL directly rather diff --git a/docs/padmux.md b/docs/padmux.md index 8f5980a1..f752f830 100644 --- a/docs/padmux.md +++ b/docs/padmux.md @@ -23,7 +23,7 @@ puts the pad back. > pad to GPIO. A pad that a MISC-style table drop hides from `reginfo --pads` > still answers here, which is the one place to see it. -## Five vendors, four mechanisms +## Six vendors, four mechanisms This is the thing to understand before touching any of it. The API looks like one question, and underneath it is four different pieces of silicon. @@ -382,6 +382,44 @@ is clock, command or data, so those pads carry the bus's name, as SigmaStar's modes do. `chip_generation` is `CHIP_XM510` or `CHIP_XM530` (XM550 is the XM530 die), set by `xm_detect_cpu()`. +### Fullhan -- a selector per pad, addressed by GPIO number + +FH8852, FH8856 and FH8858, V100, V200 and V210, are HiSilicon's shape exactly: +one register per pad in the PMU block at `0xF0000080 + 4 * pad`, and a four-bit +selector (`mfs`) in bits 24..27 of it. The functions each pad offers are the +vendor kernel's own `iopad.h` -- `PINCTRL_FUNC(SSI0_D2, 46, FUNC0, ...)` -- +generated into `src/hal/fh_padmux.h`. + +Two things are not HiSilicon's: + +- **The register is indexed by the vendor's pad id, but a pad is addressed by + its GPIO number**, which is what the kernel exports (`/sys/class/gpio/GPIO9` + is pad 46 on V200, pad 44 on V100). Every call takes and returns the GPIO + number. The few pads with no GPIO function have no number to pass, so they + appear in a walk of the whole table and nowhere else. A plain number is a + GPIO number, never a pad id, and the `5_2` spelling is refused. +- **A mux write sets four fields, not one.** The kernel's own mux + (`fh_pinctrl_func_select()`) writes the selector together with the pad's + input, output and Schmitt enables, and clears both enables on a pad no + device claims at boot. A write here does the same as the kernel's. + `func_mask` covers all four, so a composed read-modify-write does what the + kernel does; `get()` reads the selector alone. Pull and drive strength are + left as they are. + +The six V200/V210 parts share one table and the two V100 parts another; the +generator proves that by parsing each file rather than assuming it from the +names. FH8856V201 and FH8858V201 are recognised but answer "no table": the +vendor kernel ships none for them. `chip_generation` is one of the +`CHIP_FH*` values in `hal/fh.h`, set by `fh_detect_cpu()`. + +Several pads double as boot-flash lines -- on V200, GPIO7..GPIO10 are also +`SSI0_TXD`, `SSI0_RXD`, `SSI0_D2` and `SSI0_D3` -- and neither the table nor +the hardware says whether a board's flash is using them: the pad enables do not +tell (input enable reads set on every pad, output enable reads clear on every +pad). So `ipchw_padmux_set()` refuses, with `IPCHW_PADMUX_IN_USE` and nothing +written, to move a pad off any `SSI0_*` function. `ipchw_padmux_set_forced()` +and `gpio mux --force` are for whoever knows the board. + ## Pad numbers and names `gpio_pad` is the number the kernel uses, and it is the number to speak to @@ -395,6 +433,7 @@ every consumer: | Novatek | the Linux GPIO number, `group * 32 + pin` | `"P_GPIO22"` | | Xiongmai XM530/XM550 | the pad, as the vendor's `GPIO N` | `"GPIO43"` | | Xiongmai XM510 | `port * 8 + pin` | `"GPIO8_1"` | +| Fullhan | the GPIO number the kernel exports, not the pad id | `"GPIO9"` | Function names are the vendor's own and are **not portable**, not even within HiSilicon: `PWM_OUT0` on V1, `PWM0` from V2, `PWM0_OUT1` on V5. `"PWM"` also @@ -432,6 +471,16 @@ tools/gen_ingenic_padmux.py \ Each generated header carries the exact command that made it, so the recipe above is only the shape; the header is the record. +Fullhan, from the vendor kernel's per-chip `iopad.h`, one `--table` per +distinct layout; files under one tag must parse to the same rows: + +```sh +tools/gen_fh_padmux.py \ + --table V200=/arch/arm/mach-fh/fh8852v200/iopad.h,... \ + --table V100=/arch/arm/mach-fh/include/mach/fh8852_iopad.h,... \ + > src/hal/fh_padmux.h +``` + Novatek is generated differently, because its source is code and not a table: ```sh diff --git a/include/ipchw.h b/include/ipchw.h index 16aacce1..c6e8406e 100644 --- a/include/ipchw.h +++ b/include/ipchw.h @@ -67,6 +67,8 @@ enum { IPCHW_PADMUX_NO_PAD = -4, /* this SoC has no pad with that number */ IPCHW_PADMUX_NO_FUNC = -5, /* that pad cannot carry that function */ IPCHW_PADMUX_IO = -6, /* a register could not be reached */ + IPCHW_PADMUX_IN_USE = -7, /* the pad is carrying something the board + * runs from -- see ipchw_padmux_set() */ }; enum { @@ -164,4 +166,12 @@ int ipchw_padmux_get(int pad, ipchw_padmux_t *out); * WRITES /dev/mem; see the threading note above. */ int ipchw_padmux_set(int pad, const char *func_name); +/* ipchw_padmux_set() also refuses, with IPCHW_PADMUX_IN_USE and nothing + * written, to move a pad off a function the board is running from where the + * backend can tell: on Fullhan, a boot-flash line the kernel set up at boot. + * The same pad carrying that function unused is not refused. This is the one + * call that skips the check, for an operator who knows better -- and for a + * test that cycles every pad through every function. */ +int ipchw_padmux_set_forced(int pad, const char *func_name); + #endif /* IPCHW_H */ diff --git a/src/hal/fh.c b/src/hal/fh.c index a4ac39d0..a140daab 100644 --- a/src/hal/fh.c +++ b/src/hal/fh.c @@ -5,6 +5,7 @@ #include +#include "chipid.h" #include "hal/common.h" #include "tools.h" @@ -37,27 +38,35 @@ bool fh_detect_cpu(char *chip_name) { switch (sysctrl & 0xffffff) { case 0x00000001: strcpy(chip_name, "FH8852V200"); + chip_generation = CHIP_FH8852V200; break; case 0x00100001: strcpy(chip_name, "FH8856V200"); + chip_generation = CHIP_FH8856V200; break; case 0x00410001: strcpy(chip_name, "FH8858V200"); + chip_generation = CHIP_FH8858V200; break; case 0x00000002: strcpy(chip_name, "FH8852V210"); + chip_generation = CHIP_FH8852V210; break; case 0x00100002: strcpy(chip_name, "FH8856V210"); + chip_generation = CHIP_FH8856V210; break; case 0x00410002: strcpy(chip_name, "FH8858V210"); + chip_generation = CHIP_FH8858V210; break; case 0x00200001: strcpy(chip_name, "FH8856V201"); + chip_generation = CHIP_FH8856V201; break; case 0x00300001: strcpy(chip_name, "FH8858V201"); + chip_generation = CHIP_FH8858V201; break; } break; @@ -65,9 +74,11 @@ bool fh_detect_cpu(char *chip_name) { switch (ipver & 0xf) { case 0xc: strcpy(chip_name, "FH8852V100"); + chip_generation = CHIP_FH8852V100; break; case 0xd: strcpy(chip_name, "FH8856V100"); + chip_generation = CHIP_FH8856V100; break; } break; diff --git a/src/hal/fh.h b/src/hal/fh.h index 3269cdb2..6e95aeda 100644 --- a/src/hal/fh.h +++ b/src/hal/fh.h @@ -9,6 +9,22 @@ #define REG_PMU_FW_VER (PMU_REG_BASE + 0x0008) #define REG_PMU_SYS_CTRL (PMU_REG_BASE + 0x000c) +/* chip_generation for the parts hal/fh_padmux.c has a pad table for, and the + * two it knows it has none for. "FH", the model, and a last nibble for the + * revision: 1 V100, 2 V200, 3 V210, 4 V201. */ +enum { + CHIP_FH8852V100 = 0x46488521, + CHIP_FH8856V100 = 0x46488561, + CHIP_FH8852V200 = 0x46488522, + CHIP_FH8856V200 = 0x46488562, + CHIP_FH8858V200 = 0x46488582, + CHIP_FH8852V210 = 0x46488523, + CHIP_FH8856V210 = 0x46488563, + CHIP_FH8858V210 = 0x46488583, + CHIP_FH8856V201 = 0x46488564, + CHIP_FH8858V201 = 0x46488584, +}; + bool fh_detect_cpu(char *chip_name); unsigned long fh_totalmem(unsigned long *media_mem); void fh_setup_hal(); diff --git a/src/hal/fh_padmux.c b/src/hal/fh_padmux.c new file mode 100644 index 00000000..fc972513 --- /dev/null +++ b/src/hal/fh_padmux.c @@ -0,0 +1,243 @@ +/* Fullhan FH8852/FH8856/FH8858, V100, V200 and V210: the pad-mux backend. + * + * The HiSilicon shape. Every pad has one register in the PMU block, at + * 0xF0000080 + 4 * pad (arch/arm/mach-fh board.c: fh_pinctrl_init( + * VA_PMU_REG_BASE + 0x80)), and its function is the four-bit `mfs` field in + * bits 24..27 of it. The functions each pad offers are the vendor kernel's + * own iopad.h, turned into fh_padmux.h by tools/gen_fh_padmux.py. + * + * TWO NUMBERINGS, and a caller only ever sees one of them. The register is + * indexed by the vendor's pad id; the kernel exports the pad as the number of + * its GPIO function -- pad 46 is GPIO9, /sys/class/gpio/GPIO9 -- and that is + * what every call here takes and what gpio_pad says. A pad with no GPIO + * function has no number a caller could pass, so it shows up in a walk of + * the whole table and nowhere else. + * + * A WRITE IS FOUR FIELDS, NOT ONE. The kernel's own mux (pinctrl.c, + * fh_pinctrl_func_select) sets the selector and, for every function, the + * pad's input enable, output enable and Schmitt trigger: every PINCTRL_FUNC + * defaults output_enable to 1, and the kernel clears both enables on a pad no + * device claims at boot (fh_pinctrl_init_pin). A write here does what the + * kernel's does rather than leave a pad in a state the kernel never would. + * The rows' func_mask carries all four so a consumer composing its own + * read-modify-write does the same; get() reads the selector alone, because + * the enables say nothing about which function is live. + * + * Pull and drive strength are left as they are. The vendor sets a default for + * each function, but they are a pad's electrical setting rather than part of + * choosing what it carries. + * + * THE FLASH SHARES PADS WITH GPIOs. On V200, GPIO7..GPIO10 are also SSI0's + * TXD, RXD, D2 and D3, and SSI0 is the SPI controller the board boots and + * runs from. Which of them a board uses depends on its flash -- the vendor's + * pinctrl has an "SSI0" device and an "SSI0_4BIT" one that also takes D2/D3 + * -- and the hardware does not say: on a Tenda IC7-L the input enable reads + * set on every pad, used or not, and the output enable reads clear on every + * pad, even straight after the kernel's own mux set it. So any pad carrying + * an SSI0 function is treated as the flash's (in_use()), and moving it takes + * ipchw_padmux_set_forced(): the call for someone who knows the board, such + * as an owner who has named that pad for something else. That Tenda's + * GPIO9/GPIO10 are SSI0_D2/D3 unused by its flash, and its IR-cut coils. */ + +#include +#include +#include + +#include "chipid.h" +#include "hal/fh.h" +#include "hal/fh_padmux.h" +#include "padmux.h" + +#define FH_PAD_BASE 0xF0000080u + +#define FH_SEL_SHIFT 24 +#define FH_SEL_MASK (0xFu << FH_SEL_SHIFT) /* mfs */ +#define FH_ST (1u << 8) +#define FH_IE (1u << 12) +#define FH_OE (1u << 28) + +/* What a mux write sets besides the selector, as fh_pinctrl_func_select() + * does for every function. */ +#define FH_ENABLES (FH_ST | FH_IE | FH_OE) + +typedef struct { + const fh_func_t *rows; + int n; +} fh_table_t; + +#define FH_TABLE(t) ((fh_table_t){t, (int)(sizeof(t) / sizeof(*(t)))}) + +/* FH8856V201 and FH8858V201 are recognised but have no table: the vendor + * kernel ships none for them, and their pads are not assumed to match. */ +static fh_table_t table(void) { + switch (chip_generation) { + case CHIP_FH8852V200: + case CHIP_FH8856V200: + case CHIP_FH8858V200: + case CHIP_FH8852V210: + case CHIP_FH8856V210: + case CHIP_FH8858V210: + return FH_TABLE(FH_V200_funcs); + case CHIP_FH8852V100: + case CHIP_FH8856V100: + return FH_TABLE(FH_V100_funcs); + default: + return (fh_table_t){NULL, 0}; + } +} + +static uint32_t reg_addr(const fh_func_t *f) { + return FH_PAD_BASE + 4u * f->pad; +} + +/* The rows of the pad row `i` belongs to: [*first, *end). */ +static void pad_span(fh_table_t t, int i, int *first, int *end) { + int a = i, b = i; + while (a > 0 && t.rows[a - 1].pad == t.rows[i].pad) + a--; + while (b < t.n && t.rows[b].pad == t.rows[i].pad) + b++; + *first = a; + *end = b; +} + +/* The GPIO row of the pad row `i` belongs to, or -1. */ +static int gpio_row_of(fh_table_t t, int i) { + int first, end; + pad_span(t, i, &first, &end); + for (int k = first; k < end; k++) { + char want[16]; + snprintf(want, sizeof want, "GPIO%d", t.rows[k].gpio); + if (t.rows[k].gpio >= 0 && !strcmp(padmux_name(t.rows[k].name), want)) + return k; + } + return -1; +} + +static ipchw_padmux_t row(fh_table_t t, int i) { + const fh_func_t *f = &t.rows[i]; + const int g = gpio_row_of(t, i); + return (ipchw_padmux_t){ + .address = reg_addr(f), + .func_mask = FH_SEL_MASK | FH_ENABLES, + .func = (int)(((uint32_t)f->sel << FH_SEL_SHIFT) | FH_ENABLES), + .func_name = padmux_name(f->name), + .gpio_name = g >= 0 ? padmux_name(t.rows[g].name) : NULL, + .gpio_pad = g >= 0 ? f->gpio : -1, + .gpio_func = + g >= 0 ? (int)(((uint32_t)t.rows[g].sel << FH_SEL_SHIFT) | + FH_ENABLES) + : -1, + .flags = IPCHW_PADMUX_F_RMW | IPCHW_PADMUX_F_SHARED_REG | + (g == i ? IPCHW_PADMUX_F_GPIO : 0), + }; +} + +/* The first row of the pad exported as GPIO `pad`, or -1. */ +static int find_pad(fh_table_t t, int pad) { + for (int i = 0; i < t.n; i++) + if (t.rows[i].gpio >= 0 && t.rows[i].gpio == pad) + return i; + return -1; +} + +static int fh_walk(padmux_match_fn match, const void *arg, int pad, + ipchw_padmux_t *out, int max) { + fh_table_t t = table(); + if (t.n == 0) + return IPCHW_PADMUX_NO_TABLE; + + int found = 0; + for (int i = 0; i < t.n; i++) { + if (pad >= 0 && t.rows[i].gpio != pad) + continue; + ipchw_padmux_t r = row(t, i); + if (match != NULL && !match(r.func_name, arg)) + continue; + if (found < max) + out[found] = r; + found++; + } + return found; +} + +static int fh_get(int pad, ipchw_padmux_t *out, const padmux_io_t *io) { + fh_table_t t = table(); + if (t.n == 0) + return IPCHW_PADMUX_NO_TABLE; + int i = find_pad(t, pad); + if (i < 0) + return IPCHW_PADMUX_NO_PAD; + + uint32_t v; + if (!io->read(reg_addr(&t.rows[i]), &v, 32)) + return IPCHW_PADMUX_IO; + + const unsigned sel = (v & FH_SEL_MASK) >> FH_SEL_SHIFT; + int first, end; + pad_span(t, i, &first, &end); + for (int k = first; k < end; k++) { + if (t.rows[k].sel == sel) { + *out = row(t, k); + return 1; + } + } + return 0; /* a selector the vendor's table has no function for */ +} + +static int fh_set(int pad, const char *func_name, const padmux_io_t *io) { + fh_table_t t = table(); + if (t.n == 0) + return IPCHW_PADMUX_NO_TABLE; + int i = find_pad(t, pad); + if (i < 0) + return IPCHW_PADMUX_NO_PAD; + + int first, end, want = -1; + pad_span(t, i, &first, &end); + if (!strcmp(func_name, IPCHW_PADMUX_GPIO)) + want = gpio_row_of(t, i); + for (int k = first; k < end && want < 0; k++) + if (!strcmp(func_name, padmux_name(t.rows[k].name))) + want = k; + if (want < 0) + return IPCHW_PADMUX_NO_FUNC; + + const ipchw_padmux_t r = row(t, want); + uint32_t v; + if (!io->read(r.address, &v, 32)) + return IPCHW_PADMUX_IO; + v = (v & ~r.func_mask) | (uint32_t)r.func; + if (!io->write(r.address, v, 32)) + return IPCHW_PADMUX_IO; + return 0; +} + +static bool fh_in_use(int pad, const padmux_io_t *io) { + ipchw_padmux_t now; + const int res = fh_get(pad, &now, io); + if (res == IPCHW_PADMUX_IO) + return true; /* cannot tell: not known to be free */ + return res == 1 && !strncmp(now.func_name, "SSI0_", 5); +} + +/* "GPIO9" or "9", both the GPIO number and never the pad id. HiSilicon's + * "5_2" is refused: Fullhan does not number its GPIOs in banks of eight, so + * it would name a different pad. */ +static int fh_parse_pad(const char *spec) { + const char *s = strncmp(spec, "GPIO", 4) == 0 ? spec + 4 : spec; + char *tail; + long v = strtol(s, &tail, 10); + if (tail == s || *tail != '\0' || v < 0) + return -1; + return find_pad(table(), (int)v) >= 0 ? (int)v : -1; +} + +const padmux_ops_t PADMUX_OPS_FH = { + .name = "fh", + .walk = fh_walk, + .get = fh_get, + .set = fh_set, + .parse_pad = fh_parse_pad, + .in_use = fh_in_use, +}; diff --git a/src/hal/fh_padmux.h b/src/hal/fh_padmux.h new file mode 100644 index 00000000..6747251a --- /dev/null +++ b/src/hal/fh_padmux.h @@ -0,0 +1,482 @@ +/* Generated by tools/gen_fh_padmux.py -- do not edit. + * + * Fullhan pad functions, one row per (pad, selector), from the vendor + * kernel's iopad.h. A pad's register is 0xF0000080 + 4 * pad and the + * selector is its bits 24..27; see src/hal/fh_padmux.c. + * + * Regenerate with: + * tools/gen_fh_padmux.py \ + * --table V200=fullhan-fh8852v200@ee1ef844/arch/arm/mach-fh/fh8852v200/iopad.h,fullhan-fh8852v200@ee1ef844/arch/arm/mach-fh/fh8852v210/iopad.h,fullhan-fh8852v200@ee1ef844/arch/arm/mach-fh/fh8856v200/iopad.h,fullhan-fh8852v200@ee1ef844/arch/arm/mach-fh/fh8856v210/iopad.h,fullhan-fh8852v200@ee1ef844/arch/arm/mach-fh/fh8858v200/iopad.h,fullhan-fh8852v200@ee1ef844/arch/arm/mach-fh/fh8858v210/iopad.h \ + * --table V100=fullhan-fh8852v100@4825e16e/arch/arm/mach-fh/include/mach/fh8852_iopad.h,fullhan-fh8852v100@4825e16e/arch/arm/mach-fh/include/mach/fh8856_iopad.h + * + * From OpenIPC/linux, as @/: + * 51f2c97f11092e8d fullhan-fh8852v200@ee1ef844/arch/arm/mach-fh/fh8852v200/iopad.h + * 51f2c97f11092e8d fullhan-fh8852v200@ee1ef844/arch/arm/mach-fh/fh8852v210/iopad.h + * 51f2c97f11092e8d fullhan-fh8852v200@ee1ef844/arch/arm/mach-fh/fh8856v200/iopad.h + * 51f2c97f11092e8d fullhan-fh8852v200@ee1ef844/arch/arm/mach-fh/fh8856v210/iopad.h + * ad3fd4c5b44db547 fullhan-fh8852v200@ee1ef844/arch/arm/mach-fh/fh8858v200/iopad.h + * ad3fd4c5b44db547 fullhan-fh8852v200@ee1ef844/arch/arm/mach-fh/fh8858v210/iopad.h + * 6044912c8928cd9e fullhan-fh8852v100@4825e16e/arch/arm/mach-fh/include/mach/fh8852_iopad.h + * 80d061d5ce765b11 fullhan-fh8852v100@4825e16e/arch/arm/mach-fh/include/mach/fh8856_iopad.h + */ + +#ifndef HAL_FH_PADMUX_H +#define HAL_FH_PADMUX_H + +#include "hal/fh_padmux_types.h" + +/* V200: 65 pads, 254 functions, 64 of the pads a GPIO. */ +static const fh_func_t FH_V200_funcs[] = { + {0, 0, 30, PMX_GPIO30}, + {1, 0, 31, PMX_GPIO31}, + {1, 1, 31, PMX_ETH_LINK_ACT}, + {2, 0, 32, PMX_GPIO32}, + {2, 1, 32, PMX_ETH_LINK_STA}, + {2, 2, 32, PMX_ETH_LINK_SPD}, + {3, 0, 33, PMX_UART0_TX}, + {3, 1, 33, PMX_GPIO33}, + {4, 0, 34, PMX_UART0_RX}, + {4, 1, 34, PMX_GPIO34}, + {5, 0, 35, PMX_I2C0_SCL}, + {5, 1, 35, PMX_GPIO35}, + {6, 0, 36, PMX_I2C0_SDA}, + {6, 1, 36, PMX_GPIO36}, + {7, 0, 12, PMX_SENSOR_CLK}, + {7, 1, 12, PMX_GPIO12}, + {8, 0, 13, PMX_GPIO13}, + {9, 0, 39, PMX_UART1_TX}, + {9, 1, 39, PMX_GPIO39}, + {9, 3, 39, PMX_SD1_CLK}, + {9, 6, 39, PMX_TEST_O_INT_RMII_CLK}, + {10, 0, 40, PMX_UART1_RX}, + {10, 1, 40, PMX_GPIO40}, + {10, 3, 40, PMX_SD1_CD}, + {10, 6, 40, PMX_TEST_INT_RMII_TXD_0}, + {11, 0, 37, PMX_I2C1_SCL}, + {11, 1, 37, PMX_GPIO37}, + {11, 2, 37, PMX_PWM2}, + {11, 3, 37, PMX_SD1_CMD_RSP}, + {11, 5, 37, PMX_SSI1_CLK}, + {11, 6, 37, PMX_TEST_INT_RMII_TXD_1}, + {12, 0, 38, PMX_I2C1_SDA}, + {12, 1, 38, PMX_GPIO38}, + {12, 2, 38, PMX_PWM3}, + {12, 3, 38, PMX_SD1_DATA_0}, + {12, 5, 38, PMX_SSI1_CSN_0}, + {12, 6, 38, PMX_TEST_INT_RMII_TXEN}, + {13, 0, 41, PMX_UART2_TX}, + {13, 1, 41, PMX_GPIO41}, + {13, 2, 41, PMX_PWM4}, + {13, 3, 41, PMX_SD1_DATA_1}, + {13, 5, 41, PMX_SSI1_TXD}, + {13, 6, 41, PMX_TEST_O_INT_RMII_RXD_0}, + {14, 0, 42, PMX_UART2_RX}, + {14, 1, 42, PMX_GPIO42}, + {14, 2, 42, PMX_PWM5}, + {14, 3, 42, PMX_SD1_DATA_2}, + {14, 5, 42, PMX_SSI1_RXD}, + {14, 6, 42, PMX_TEST_O_INT_RMII_RXD_1}, + {15, 0, 47, PMX_USB_PWREN}, + {15, 1, 47, PMX_GPIO47}, + {15, 3, 47, PMX_SD1_DATA_3}, + {15, 6, 47, PMX_TEST_O_INT_RMII_CRSDV}, + {16, 0, 43, PMX_PWM0}, + {16, 1, 43, PMX_GPIO43}, + {16, 2, 43, PMX_I2C2_SCL}, + {16, 3, 43, PMX_UART2_TX}, + {16, 6, 43, PMX_TEST_O_INT_RMII_TXD_0}, + {17, 0, 44, PMX_PWM1}, + {17, 1, 44, PMX_GPIO44}, + {17, 2, 44, PMX_I2C2_SDA}, + {17, 3, 44, PMX_UART2_RX}, + {17, 6, 44, PMX_TEST_O_INT_RMII_TXD_1}, + {18, 0, 45, PMX_PWM2}, + {18, 1, 45, PMX_GPIO45}, + {19, 0, 46, PMX_PWM3}, + {19, 1, 46, PMX_GPIO46}, + {20, 0, 48, PMX_MAC_RMII_CLK}, + {20, 1, 48, PMX_GPIO48}, + {20, 2, 48, PMX_SD1_CLK}, + {20, 3, 48, PMX_PWM2}, + {21, 0, -1, PMX_MAC_REF_CLK}, + {22, 0, 49, PMX_MAC_TXD_0}, + {22, 1, 49, PMX_GPIO49}, + {22, 2, 49, PMX_SD1_CD}, + {22, 3, 49, PMX_PWM3}, + {23, 0, 50, PMX_MAC_TXD_1}, + {23, 1, 50, PMX_GPIO50}, + {23, 2, 50, PMX_SD1_CMD_RSP}, + {23, 3, 50, PMX_PWM4}, + {24, 0, 51, PMX_MAC_TXEN}, + {24, 1, 51, PMX_GPIO51}, + {24, 2, 51, PMX_SD1_DATA_0}, + {24, 3, 51, PMX_PWM5}, + {25, 0, 52, PMX_MAC_RXD_0}, + {25, 1, 52, PMX_GPIO52}, + {25, 2, 52, PMX_SD1_DATA_1}, + {25, 3, 52, PMX_PWM6}, + {26, 0, 53, PMX_MAC_RXD_1}, + {26, 1, 53, PMX_GPIO53}, + {26, 2, 53, PMX_SD1_DATA_2}, + {26, 3, 53, PMX_PWM7}, + {27, 0, 54, PMX_MAC_RXDV}, + {27, 1, 54, PMX_GPIO54}, + {27, 2, 54, PMX_SD1_DATA_3}, + {27, 3, 54, PMX_PWM8}, + {28, 0, 55, PMX_MAC_MDC}, + {28, 1, 55, PMX_GPIO55}, + {28, 3, 55, PMX_PWM9}, + {29, 0, 56, PMX_MAC_MDIO}, + {29, 1, 56, PMX_GPIO56}, + {30, 0, 57, PMX_SD1_CLK}, + {30, 1, 57, PMX_GPIO57}, + {30, 2, 57, PMX_I2C1_SCL}, + {31, 0, 58, PMX_SD1_CD}, + {31, 1, 58, PMX_GPIO58}, + {31, 2, 58, PMX_I2C1_SDA}, + {32, 0, 59, PMX_SD1_CMD_RSP}, + {32, 1, 59, PMX_GPIO59}, + {32, 2, 59, PMX_UART1_TX}, + {33, 0, 60, PMX_SD1_DATA_0}, + {33, 1, 60, PMX_GPIO60}, + {33, 2, 60, PMX_UART1_RX}, + {34, 0, 61, PMX_SD1_DATA_1}, + {34, 1, 61, PMX_GPIO61}, + {34, 2, 61, PMX_UART2_TX}, + {35, 0, 62, PMX_SD1_DATA_2}, + {35, 1, 62, PMX_GPIO62}, + {35, 2, 62, PMX_UART2_RX}, + {36, 0, 63, PMX_SD1_DATA_3}, + {36, 1, 63, PMX_GPIO63}, + {37, 0, 0, PMX_ARM_JTAG_TRSTN}, + {37, 1, 0, PMX_GPIO0}, + {37, 2, 0, PMX_AC_I2S_DO}, + {37, 3, 0, PMX_DW_I2S_DO}, + {37, 4, 0, PMX_SSI1_CLK}, + {37, 5, 0, PMX_SSI2_CLK}, + {37, 6, 0, PMX_ACIP_ADDAT}, + {37, 7, 0, PMX_PWM6}, + {37, 8, 0, PMX_TEST_O_INT_SMI_MDC}, + {38, 0, 1, PMX_ARM_JTAG_TDO}, + {38, 1, 1, PMX_GPIO1}, + {38, 2, 1, PMX_AC_I2S_DI}, + {38, 3, 1, PMX_DW_I2S_DI}, + {38, 4, 1, PMX_SSI1_CSN_0}, + {38, 5, 1, PMX_SSI2_CSN_0}, + {38, 6, 1, PMX_ACIP_DADAT}, + {38, 7, 1, PMX_PWM7}, + {38, 8, 1, PMX_TEST_O_INT_SMI_MDIO_I}, + {39, 0, 2, PMX_ARM_JTAG_TDI}, + {39, 1, 2, PMX_GPIO2}, + {39, 2, 2, PMX_AC_I2S_CLK}, + {39, 3, 2, PMX_DW_I2S_CLK}, + {39, 4, 2, PMX_SSI1_TXD}, + {39, 5, 2, PMX_SSI2_TXD}, + {39, 6, 2, PMX_ACIP_ADBCLK}, + {39, 7, 2, PMX_PWM8}, + {39, 8, 2, PMX_TEST_O_INT_SMI_MDIO_O}, + {40, 0, 3, PMX_ARM_JTAG_TCK}, + {40, 1, 3, PMX_GPIO3}, + {40, 2, 3, PMX_AC_I2S_WS}, + {40, 3, 3, PMX_DW_I2S_WS}, + {40, 4, 3, PMX_SSI1_RXD}, + {40, 5, 3, PMX_SSI2_RXD}, + {40, 6, 3, PMX_ACIP_ADLRC}, + {40, 7, 3, PMX_PWM9}, + {40, 8, 3, PMX_TEST_I_INT_SMI_MDIO_I}, + {41, 0, 4, PMX_ARM_JTAG_TMS}, + {41, 1, 4, PMX_GPIO4}, + {41, 2, 4, PMX_AC_MCLK}, + {41, 3, 4, PMX_USB_PWREN}, + {41, 4, 4, PMX_SD1_CD}, + {41, 5, 4, PMX_TEST_I_INT_SMI_MDC}, + {42, 0, 5, PMX_SSI0_CLK}, + {42, 1, 5, PMX_GPIO5}, + {42, 4, 5, PMX_SD1_CLK}, + {43, 0, 6, PMX_SSI0_CSN_0}, + {43, 1, 6, PMX_GPIO6}, + {43, 4, 6, PMX_SD1_CMD_RSP}, + {44, 0, 7, PMX_SSI0_TXD}, + {44, 1, 7, PMX_GPIO7}, + {44, 4, 7, PMX_SD1_DATA_0}, + {45, 0, 8, PMX_SSI0_RXD}, + {45, 1, 8, PMX_GPIO8}, + {45, 4, 8, PMX_SD1_DATA_1}, + {46, 0, 9, PMX_SSI0_D2}, + {46, 1, 9, PMX_GPIO9}, + {46, 2, 9, PMX_UART1_TX}, + {46, 3, 9, PMX_I2C1_SCL}, + {46, 4, 9, PMX_SD1_DATA_2}, + {47, 0, 10, PMX_SSI0_D3}, + {47, 1, 10, PMX_GPIO10}, + {47, 2, 10, PMX_UART1_RX}, + {47, 3, 10, PMX_I2C1_SDA}, + {47, 4, 10, PMX_SD1_DATA_3}, + {48, 0, 11, PMX_SSI1_CLK}, + {48, 1, 11, PMX_GPIO11}, + {48, 2, 11, PMX_SSI2_CLK}, + {49, 0, 14, PMX_SSI1_CSN_0}, + {49, 1, 14, PMX_GPIO14}, + {49, 2, 14, PMX_SSI2_CSN_0}, + {50, 0, 15, PMX_SSI1_TXD}, + {50, 1, 15, PMX_GPIO15}, + {50, 2, 15, PMX_SSI2_TXD}, + {51, 0, 16, PMX_SSI1_RXD}, + {51, 1, 16, PMX_GPIO16}, + {51, 2, 16, PMX_SSI2_RXD}, + {52, 0, 17, PMX_SD0_CD}, + {52, 1, 17, PMX_GPIO17}, + {52, 3, 17, PMX_ARC_JTAG_TRSTN}, + {52, 4, 17, PMX_PAE_JTAG_TRSTN}, + {53, 0, 18, PMX_SD0_CLK}, + {53, 1, 18, PMX_GPIO18}, + {53, 2, 18, PMX_SSI1_CLK}, + {53, 3, 18, PMX_ARC_JTAG_TDO}, + {53, 4, 18, PMX_PAE_JTAG_TDO}, + {54, 0, 19, PMX_SD0_CMD_RSP}, + {54, 1, 19, PMX_GPIO19}, + {54, 2, 19, PMX_SSI1_TXD}, + {54, 3, 19, PMX_ARC_JTAG_TDI}, + {54, 4, 19, PMX_PAE_JTAG_TDI}, + {55, 0, 20, PMX_SD0_DATA_0}, + {55, 1, 20, PMX_GPIO20}, + {55, 2, 20, PMX_SSI1_RXD}, + {55, 3, 20, PMX_ARC_JTAG_TCK}, + {55, 4, 20, PMX_PAE_JTAG_TCK}, + {56, 0, 21, PMX_SD0_DATA_1}, + {56, 1, 21, PMX_GPIO21}, + {56, 2, 21, PMX_SSI1_CSN_0}, + {56, 3, 21, PMX_ARC_JTAG_TMS}, + {56, 4, 21, PMX_PAE_JTAG_TMS}, + {57, 0, 22, PMX_SD0_DATA_2}, + {57, 1, 22, PMX_GPIO22}, + {57, 3, 22, PMX_UART2_TX}, + {57, 4, 22, PMX_I2C2_SCL}, + {57, 6, 22, PMX_ACIP_DABCLK}, + {58, 0, 23, PMX_SD0_DATA_3}, + {58, 1, 23, PMX_GPIO23}, + {58, 2, 23, PMX_SSI1_CSN_0}, + {58, 3, 23, PMX_UART2_RX}, + {58, 4, 23, PMX_I2C2_SDA}, + {58, 6, 23, PMX_ACIP_DALRC}, + {59, 0, 26, PMX_SADC_XAIN0}, + {59, 1, 26, PMX_GPIO26}, + {60, 0, 27, PMX_SADC_XAIN1}, + {60, 1, 27, PMX_GPIO27}, + {61, 0, 24, PMX_SADC_XAIN2}, + {61, 1, 24, PMX_GPIO24}, + {62, 0, 25, PMX_SADC_XAIN3}, + {62, 1, 25, PMX_GPIO25}, + {63, 0, 28, PMX_GPIO28}, + {63, 2, 28, PMX_ETH_LINK_ACT}, + {63, 3, 28, PMX_PWM10}, + {63, 4, 28, PMX_USB_DBG_CLK}, + {63, 5, 28, PMX_SD1_CD}, + {63, 6, 28, PMX_TEST_O_INT_RMII_TXEN}, + {63, 7, 28, PMX_MAC_MDC}, + {64, 0, 29, PMX_GPIO29}, + {64, 2, 29, PMX_ETH_LINK_STA}, + {64, 3, 29, PMX_PWM11}, + {64, 4, 29, PMX_RTC_CLK}, + {64, 5, 29, PMX_ETH_LINK_SPD}, + {64, 6, 29, PMX_TEST_O_INT_SMI_MDIO_OE}, + {64, 7, 29, PMX_MAC_MDIO}, +}; + +/* V100: 54 pads, 192 functions, 50 of the pads a GPIO. */ +static const fh_func_t FH_V100_funcs[] = { + {0, 0, 19, PMX_GPIO19}, + {0, 1, 19, PMX_UART1_TX}, + {1, 0, 20, PMX_GPIO20}, + {1, 1, 20, PMX_UART1_RX}, + {2, 0, 21, PMX_GPIO21}, + {2, 1, 21, PMX_I2C1_SDA}, + {3, 0, 25, PMX_GPIO25}, + {3, 1, 25, PMX_SSI1_TXD}, + {3, 2, 25, PMX_SSI2_TXD}, + {4, 0, 26, PMX_GPIO26}, + {4, 1, 26, PMX_SSI1_RXD}, + {4, 2, 26, PMX_SSI2_RXD}, + {5, 0, 27, PMX_GPIO27}, + {5, 1, 27, PMX_SSI1_CLK}, + {5, 2, 27, PMX_SSI2_CLK}, + {6, 0, 28, PMX_GPIO28}, + {6, 1, 28, PMX_SSI1_CSN_0}, + {6, 2, 28, PMX_SSI2_CSN}, + {6, 3, 28, PMX_USB_DBG_CLK}, + {7, 0, 50, PMX_SSI0_D2}, + {7, 1, 50, PMX_GPIO50}, + {7, 2, 50, PMX_I2C1_SDA}, + {7, 3, 50, PMX_UART1_TX}, + {8, 0, 51, PMX_SSI0_D3}, + {8, 1, 51, PMX_GPIO51}, + {8, 2, 51, PMX_I2C1_SCL}, + {8, 3, 51, PMX_UART1_RX}, + {9, 0, 22, PMX_GPIO22}, + {9, 1, 22, PMX_I2C1_SCL}, + {10, 0, 23, PMX_GPIO23}, + {10, 1, 23, PMX_AC_MCLK}, + {11, 0, 24, PMX_GPIO24}, + {11, 1, 24, PMX_USB_PWREN}, + {15, 0, 15, PMX_MAC_RMII_CLK}, + {15, 1, 15, PMX_GPIO15}, + {15, 2, 15, PMX_SD1_CLK}, + {15, 3, 15, PMX_PWM0}, + {15, 4, 15, PMX_SSI1_CLK}, + {15, 5, 15, PMX_SSI2_CLK}, + {16, 0, -1, PMX_MAC_REF_CLK}, + {17, 0, 34, PMX_MAC_MDC}, + {17, 1, 34, PMX_GPIO34}, + {17, 2, 34, PMX_SD1_WP}, + {17, 3, 34, PMX_RTC_CLK}, + {17, 4, 34, PMX_AC_MCLK}, + {17, 5, 34, PMX_USB_PWREN}, + {18, 0, 17, PMX_MAC_MDIO}, + {18, 1, 17, PMX_GPIO17}, + {18, 2, 17, PMX_ARM_JTAG_TDO}, + {18, 3, 17, PMX_PWM7}, + {22, 0, 16, PMX_MAC_RXD_0}, + {22, 1, 16, PMX_GPIO16}, + {22, 2, 16, PMX_SD1_DATA_0}, + {22, 3, 16, PMX_PWM1}, + {22, 4, 16, PMX_SSI1_RXD}, + {22, 5, 16, PMX_SSI2_RXD}, + {23, 0, 38, PMX_MAC_RXD_1}, + {23, 1, 38, PMX_GPIO38}, + {23, 2, 38, PMX_SD1_DATA_1}, + {23, 3, 38, PMX_PWM2}, + {23, 4, 38, PMX_SSI1_CSN_0}, + {23, 5, 38, PMX_SSI2_CSN}, + {26, 0, 41, PMX_MAC_RXDV}, + {26, 1, 41, PMX_GPIO41}, + {26, 2, 41, PMX_SD1_CD}, + {26, 3, 41, PMX_PWM3}, + {28, 0, 42, PMX_MAC_TXD_0}, + {28, 1, 42, PMX_GPIO42}, + {28, 2, 42, PMX_SD1_DATA_2}, + {28, 3, 42, PMX_PWM4}, + {29, 0, 43, PMX_MAC_TXD_1}, + {29, 1, 43, PMX_GPIO43}, + {29, 2, 43, PMX_SD1_DATA_3}, + {29, 3, 43, PMX_PWM5}, + {29, 4, 43, PMX_SSI1_CSN_0}, + {29, 5, 43, PMX_SSI2_CSN}, + {32, 0, 46, PMX_MAC_TXEN}, + {32, 1, 46, PMX_GPIO46}, + {32, 2, 46, PMX_SD1_CMD_RSP}, + {32, 3, 46, PMX_PWM6}, + {32, 4, 46, PMX_SSI1_TXD}, + {32, 5, 46, PMX_SSI2_TXD}, + {35, 0, 0, PMX_ARM_JTAG_TRSTN}, + {35, 1, 0, PMX_GPIO0}, + {35, 2, 0, PMX_SSI1_TXD}, + {35, 3, 0, PMX_SSI2_TXD}, + {35, 4, 0, PMX_AC_I2S_DO}, + {35, 5, 0, PMX_DW_I2S_DO}, + {35, 6, 0, PMX_ACIP_ADDAT}, + {36, 0, 1, PMX_ARM_JTAG_TMS}, + {36, 1, 1, PMX_GPIO1}, + {36, 2, 1, PMX_SSI1_RXD}, + {36, 3, 1, PMX_SSI2_RXD}, + {36, 4, 1, PMX_AC_I2S_DI}, + {36, 5, 1, PMX_DW_I2S_DI}, + {37, 0, 2, PMX_ARM_JTAG_TCK}, + {37, 1, 2, PMX_GPIO2}, + {37, 2, 2, PMX_SSI1_CLK}, + {37, 3, 2, PMX_SSI2_CLK}, + {37, 4, 2, PMX_AC_I2S_CLK}, + {37, 5, 2, PMX_DW_I2S_CLK}, + {37, 6, 2, PMX_ACIP_BCLK}, + {38, 0, 3, PMX_ARM_JTAG_TDI}, + {38, 1, 3, PMX_GPIO3}, + {38, 2, 3, PMX_SSI1_CSN_0}, + {38, 3, 3, PMX_SSI2_CSN}, + {38, 4, 3, PMX_AC_I2S_WS}, + {38, 5, 3, PMX_DW_I2S_WS}, + {38, 6, 3, PMX_ACIP_ADLRC}, + {39, 0, 4, PMX_GPIO4}, + {39, 1, 4, PMX_SD1_CLK}, + {39, 2, 4, PMX_PWM0}, + {40, 0, 5, PMX_GPIO5}, + {40, 1, 5, PMX_SD1_DATA_0}, + {40, 2, 5, PMX_PWM1}, + {41, 0, 6, PMX_GPIO6}, + {41, 1, 6, PMX_SD1_DATA_1}, + {41, 2, 6, PMX_PWM2}, + {42, 0, 7, PMX_GPIO7}, + {42, 1, 7, PMX_SD1_CD}, + {42, 2, 7, PMX_PWM3}, + {43, 0, 8, PMX_GPIO8}, + {43, 1, 8, PMX_SD1_DATA_2}, + {43, 2, 8, PMX_PWM4}, + {44, 0, 9, PMX_GPIO9}, + {44, 1, 9, PMX_SD1_DATA_3}, + {44, 2, 9, PMX_PWM5}, + {45, 0, 10, PMX_GPIO10}, + {45, 1, 10, PMX_SD1_CMD_RSP}, + {45, 2, 10, PMX_PWM6}, + {46, 0, 11, PMX_GPIO11}, + {46, 1, 11, PMX_SD1_WP}, + {46, 2, 11, PMX_PWM7}, + {47, 0, 12, PMX_PWM0}, + {47, 1, 12, PMX_GPIO12}, + {47, 2, 12, PMX_CIS_CLK}, + {48, 0, 13, PMX_PWM1}, + {48, 1, 13, PMX_GPIO13}, + {49, 0, 14, PMX_PWM2}, + {49, 1, 14, PMX_GPIO14}, + {50, 0, 48, PMX_UART0_RX}, + {50, 1, 48, PMX_GPIO48}, + {51, 0, 49, PMX_UART0_TX}, + {51, 1, 49, PMX_GPIO49}, + {52, 0, 57, PMX_I2C0_SCL}, + {52, 1, 57, PMX_GPIO57}, + {53, 0, 56, PMX_I2C0_SDA}, + {53, 1, 56, PMX_GPIO56}, + {56, 0, -1, PMX_SSI0_CLK}, + {57, 0, -1, PMX_SSI0_TXD}, + {58, 0, 54, PMX_SSI0_CSN_0}, + {58, 1, 54, PMX_GPIO54}, + {59, 0, 55, PMX_SSI0_CSN_1}, + {59, 1, 55, PMX_GPIO55}, + {60, 0, -1, PMX_SSI0_RXD}, + {61, 0, 52, PMX_SD0_CD}, + {61, 1, 52, PMX_GPIO52}, + {61, 2, 52, PMX_ARC_JTAG_TRSTN}, + {61, 3, 52, PMX_PAE_JTAG_TRSTN}, + {62, 0, 53, PMX_SD0_WP}, + {62, 1, 53, PMX_GPIO53}, + {63, 0, 63, PMX_SD0_CLK}, + {63, 1, 63, PMX_GPIO63}, + {63, 2, 63, PMX_ARC_JTAG_TMS}, + {63, 3, 63, PMX_PAE_JTAG_TMS}, + {63, 4, 63, PMX_SSI1_CLK}, + {64, 0, 29, PMX_SD0_CMD_RSP}, + {64, 1, 29, PMX_GPIO29}, + {64, 2, 29, PMX_ARC_JTAG_TCK}, + {64, 3, 29, PMX_PAE_JTAG_TCK}, + {64, 4, 29, PMX_SSI1_TXD}, + {65, 0, 62, PMX_SD0_DATA_0}, + {65, 1, 62, PMX_GPIO62}, + {65, 2, 62, PMX_ARC_JTAG_TDI}, + {65, 3, 62, PMX_PAE_JTAG_TDI}, + {65, 4, 62, PMX_SSI1_RXD}, + {66, 0, 61, PMX_SD0_DATA_1}, + {66, 1, 61, PMX_GPIO61}, + {66, 2, 61, PMX_USB_PWREN}, + {66, 3, 61, PMX_AC_MCLK}, + {66, 4, 61, PMX_SSI1_CSN_0}, + {67, 0, 60, PMX_SD0_DATA_2}, + {67, 1, 60, PMX_GPIO60}, + {67, 2, 60, PMX_I2C1_SDA}, + {67, 3, 60, PMX_UART1_TX}, + {67, 4, 60, PMX_ARC_JTAG_TDO}, + {68, 0, 18, PMX_SD0_DATA_3}, + {68, 1, 18, PMX_GPIO18}, + {68, 2, 18, PMX_I2C1_SCL}, + {68, 3, 18, PMX_UART1_RX}, + {68, 4, 18, PMX_PAE_JTAG_TDO}, + {68, 5, 18, PMX_SSI1_CSN_0}, +}; + +#endif /* HAL_FH_PADMUX_H */ diff --git a/src/hal/fh_padmux_types.h b/src/hal/fh_padmux_types.h new file mode 100644 index 00000000..b25f2765 --- /dev/null +++ b/src/hal/fh_padmux_types.h @@ -0,0 +1,23 @@ +#ifndef HAL_FH_PADMUX_TYPES_H +#define HAL_FH_PADMUX_TYPES_H + +#include + +#include "padmux_names.h" + +/* The shape of the generated tables in fh_padmux.h. Separate from them so the + * generator emits data and nothing else. + * + * One row per (pad, selector) pair, grouped by pad and in selector order + * within it. `gpio` is the number the pad's GPIO function carries -- the "9" + * of GPIO9, which is what the kernel exports it as -- on every row of that + * pad, or -1 for the few pads with no GPIO function at all. `name` is an + * OFFSET into padmux_names, not a pointer: see reginfo.h for why. */ +typedef const struct { + uint8_t pad; /* the vendor's pad id: the register is base + 4 * pad */ + uint8_t sel; /* the value of the pad's four-bit function field */ + int8_t gpio; + uint16_t name; +} fh_func_t; + +#endif /* HAL_FH_PADMUX_TYPES_H */ diff --git a/src/padmux.c b/src/padmux.c index 62847e5a..08b0639f 100644 --- a/src/padmux.c +++ b/src/padmux.c @@ -12,6 +12,7 @@ #include "padmux.h" #include "chipid.h" +#include "hal/fh.h" #include "hal/ingenic.h" #include "hal/novatek.h" #include "hal/sstar.h" @@ -74,6 +75,21 @@ const padmux_ops_t *padmux_ops(void) { case CHIP_XM510: case CHIP_XM530: return &PADMUX_OPS_XM; +#endif +#ifdef IPCHW_PADMUX_FH + /* The two V201 parts too, so their answer is the backend's "no table" + * rather than the HiSilicon fallback's. */ + case CHIP_FH8852V100: + case CHIP_FH8856V100: + case CHIP_FH8852V200: + case CHIP_FH8856V200: + case CHIP_FH8858V200: + case CHIP_FH8852V210: + case CHIP_FH8856V210: + case CHIP_FH8858V210: + case CHIP_FH8856V201: + case CHIP_FH8858V201: + return &PADMUX_OPS_FH; #endif default: break; @@ -169,7 +185,7 @@ int ipchw_padmux_get(int pad, ipchw_padmux_t *out) { return ops->get(pad, out, IO); } -int ipchw_padmux_set(int pad, const char *func_name) { +static int padmux_set(int pad, const char *func_name, bool force) { if (pad < 0 || func_name == NULL || !*func_name) return IPCHW_PADMUX_BAD_ARG; @@ -178,9 +194,24 @@ int ipchw_padmux_set(int pad, const char *func_name) { if (res < 0) return res; + /* Writing what the pad already carries is not moving it off anything. */ + if (!force && ops->in_use != NULL && ops->in_use(pad, IO)) { + ipchw_padmux_t now; + if (ops->get(pad, &now, IO) != 1 || strcmp(now.func_name, func_name)) + return IPCHW_PADMUX_IN_USE; + } + return ops->set(pad, func_name, IO); } +int ipchw_padmux_set(int pad, const char *func_name) { + return padmux_set(pad, func_name, false); +} + +int ipchw_padmux_set_forced(int pad, const char *func_name) { + return padmux_set(pad, func_name, true); +} + bool padmux_pad_is_gpio(int pad) { ipchw_padmux_t row; diff --git a/src/padmux.h b/src/padmux.h index 5dcc32f2..3db482d2 100644 --- a/src/padmux.h +++ b/src/padmux.h @@ -29,6 +29,9 @@ * Xiongmai HiSilicon's shape with an enable bit per alternative * instead of a selector: the pad's own register on * XM530/XM550, the port's word of eight pins on XM510. + * Fullhan HiSilicon's shape exactly, a selector field in the pad's + * own register -- but the register is indexed by pad id + * and the pad is addressed by its GPIO number. * * What a caller sees is a flat ipchw_padmux_t in every case. * ---------------------------------------------------------------------- */ @@ -74,6 +77,11 @@ typedef struct { /* The vendor's own spellings of a pad, to its number, or -1. NULL where * the two generic ones in padmux_parse_pad() are all there is. */ int (*parse_pad)(const char *spec); + + /* True when `pad` is carrying something the board runs from and must not + * be moved off it -- read from the hardware, not assumed. NULL where the + * backend cannot tell, which is every one but Fullhan's. */ + bool (*in_use)(int pad, const padmux_io_t *io); } padmux_ops_t; /* Always present: reginfo.c is compiled into every configuration, and its @@ -92,6 +100,9 @@ extern const padmux_ops_t PADMUX_OPS_NOVATEK; #ifdef IPCHW_PADMUX_XM extern const padmux_ops_t PADMUX_OPS_XM; #endif +#ifdef IPCHW_PADMUX_FH +extern const padmux_ops_t PADMUX_OPS_FH; +#endif /* The backend for the SoC that has been detected, or NULL when this build * carries no pad-mux table that could serve it. */ diff --git a/src/padmux_names.c b/src/padmux_names.c index 9baa18c8..5f6cff4d 100644 --- a/src/padmux_names.c +++ b/src/padmux_names.c @@ -10,6 +10,72 @@ const struct padmux_names padmux_names = { ._none = "", +#if defined(IPCHW_PADMUX_FH) + .ACIP_ADBCLK = "ACIP_ADBCLK", +#endif +#if defined(IPCHW_PADMUX_FH) + .ACIP_ADDAT = "ACIP_ADDAT", +#endif +#if defined(IPCHW_PADMUX_FH) + .ACIP_ADLRC = "ACIP_ADLRC", +#endif +#if defined(IPCHW_PADMUX_FH) + .ACIP_BCLK = "ACIP_BCLK", +#endif +#if defined(IPCHW_PADMUX_FH) + .ACIP_DABCLK = "ACIP_DABCLK", +#endif +#if defined(IPCHW_PADMUX_FH) + .ACIP_DADAT = "ACIP_DADAT", +#endif +#if defined(IPCHW_PADMUX_FH) + .ACIP_DALRC = "ACIP_DALRC", +#endif +#if defined(IPCHW_PADMUX_FH) + .AC_I2S_CLK = "AC_I2S_CLK", +#endif +#if defined(IPCHW_PADMUX_FH) + .AC_I2S_DI = "AC_I2S_DI", +#endif +#if defined(IPCHW_PADMUX_FH) + .AC_I2S_DO = "AC_I2S_DO", +#endif +#if defined(IPCHW_PADMUX_FH) + .AC_I2S_WS = "AC_I2S_WS", +#endif +#if defined(IPCHW_PADMUX_FH) + .AC_MCLK = "AC_MCLK", +#endif +#if defined(IPCHW_PADMUX_FH) + .ARC_JTAG_TCK = "ARC_JTAG_TCK", +#endif +#if defined(IPCHW_PADMUX_FH) + .ARC_JTAG_TDI = "ARC_JTAG_TDI", +#endif +#if defined(IPCHW_PADMUX_FH) + .ARC_JTAG_TDO = "ARC_JTAG_TDO", +#endif +#if defined(IPCHW_PADMUX_FH) + .ARC_JTAG_TMS = "ARC_JTAG_TMS", +#endif +#if defined(IPCHW_PADMUX_FH) + .ARC_JTAG_TRSTN = "ARC_JTAG_TRSTN", +#endif +#if defined(IPCHW_PADMUX_FH) + .ARM_JTAG_TCK = "ARM_JTAG_TCK", +#endif +#if defined(IPCHW_PADMUX_FH) + .ARM_JTAG_TDI = "ARM_JTAG_TDI", +#endif +#if defined(IPCHW_PADMUX_FH) + .ARM_JTAG_TDO = "ARM_JTAG_TDO", +#endif +#if defined(IPCHW_PADMUX_FH) + .ARM_JTAG_TMS = "ARM_JTAG_TMS", +#endif +#if defined(IPCHW_PADMUX_FH) + .ARM_JTAG_TRSTN = "ARM_JTAG_TRSTN", +#endif #if defined(IPCHW_PADMUX_NOVATEK) .A_GPIO0 = "A_GPIO0", #endif @@ -64,6 +130,9 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_INGENIC) .CIM2_VIC_MCLK_PC = "CIM2_VIC_MCLK_PC", #endif +#if defined(IPCHW_PADMUX_FH) + .CIS_CLK = "CIS_CLK", +#endif #if defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2A) .CLK_TEST_OUT0 = "CLK_TEST_OUT0", #endif @@ -376,6 +445,18 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_INGENIC) .DVP_VSYNC = "DVP_VSYNC", #endif +#if defined(IPCHW_PADMUX_FH) + .DW_I2S_CLK = "DW_I2S_CLK", +#endif +#if defined(IPCHW_PADMUX_FH) + .DW_I2S_DI = "DW_I2S_DI", +#endif +#if defined(IPCHW_PADMUX_FH) + .DW_I2S_DO = "DW_I2S_DO", +#endif +#if defined(IPCHW_PADMUX_FH) + .DW_I2S_WS = "DW_I2S_WS", +#endif #if defined(IPCHW_PADMUX_NOVATEK) .D_GPIO0 = "D_GPIO0", #endif @@ -514,12 +595,21 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_NOVATEK) .ETH_LED2 = "ETH_LED2", #endif +#if defined(IPCHW_PADMUX_FH) + .ETH_LINK_ACT = "ETH_LINK_ACT", +#endif #if defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V5) .ETH_LINK_ACT_LED = "ETH_LINK_ACT_LED", #endif #if defined(IPCHW_PADMUX_3536D) .ETH_LINK_LED = "ETH_LINK_LED", #endif +#if defined(IPCHW_PADMUX_FH) + .ETH_LINK_SPD = "ETH_LINK_SPD", +#endif +#if defined(IPCHW_PADMUX_FH) + .ETH_LINK_STA = "ETH_LINK_STA", +#endif #if defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V5) .ETH_LINK_STA_LED = "ETH_LINK_STA_LED", #endif @@ -655,6 +745,9 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_INGENIC) .GMAC_TXEN = "GMAC_TXEN", #endif +#if defined(IPCHW_PADMUX_FH) + .GPIO0 = "GPIO0", +#endif #if defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .GPIO0_0 = "GPIO0_0", #endif @@ -679,6 +772,12 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .GPIO0_7 = "GPIO0_7", #endif +#if defined(IPCHW_PADMUX_FH) + .GPIO1 = "GPIO1", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO10 = "GPIO10", +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4A) .GPIO10_0 = "GPIO10_0", #endif @@ -703,6 +802,9 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4A) .GPIO10_7 = "GPIO10_7", #endif +#if defined(IPCHW_PADMUX_FH) + .GPIO11 = "GPIO11", +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4A) .GPIO11_0 = "GPIO11_0", #endif @@ -727,6 +829,9 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) .GPIO11_7 = "GPIO11_7", #endif +#if defined(IPCHW_PADMUX_FH) + .GPIO12 = "GPIO12", +#endif #if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) .GPIO12_0 = "GPIO12_0", #endif @@ -751,6 +856,9 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) .GPIO12_7 = "GPIO12_7", #endif +#if defined(IPCHW_PADMUX_FH) + .GPIO13 = "GPIO13", +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V2A) .GPIO13_0 = "GPIO13_0", #endif @@ -775,6 +883,9 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V5) .GPIO13_7 = "GPIO13_7", #endif +#if defined(IPCHW_PADMUX_FH) + .GPIO14 = "GPIO14", +#endif #if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V5) .GPIO14_0 = "GPIO14_0", #endif @@ -799,6 +910,9 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V5) .GPIO14_7 = "GPIO14_7", #endif +#if defined(IPCHW_PADMUX_FH) + .GPIO15 = "GPIO15", +#endif #if defined(IPCHW_PADMUX_V2A) .GPIO15_0 = "GPIO15_0", #endif @@ -808,6 +922,9 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_V2A) .GPIO15_2 = "GPIO15_2", #endif +#if defined(IPCHW_PADMUX_FH) + .GPIO16 = "GPIO16", +#endif #if defined(IPCHW_PADMUX_V3A) .GPIO16_1 = "GPIO16_1", #endif @@ -817,6 +934,15 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_V3A) .GPIO16_3 = "GPIO16_3", #endif +#if defined(IPCHW_PADMUX_FH) + .GPIO17 = "GPIO17", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO18 = "GPIO18", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO19 = "GPIO19", +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .GPIO1_0 = "GPIO1_0", #endif @@ -841,6 +967,39 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .GPIO1_7 = "GPIO1_7", #endif +#if defined(IPCHW_PADMUX_FH) + .GPIO2 = "GPIO2", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO20 = "GPIO20", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO21 = "GPIO21", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO22 = "GPIO22", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO23 = "GPIO23", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO24 = "GPIO24", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO25 = "GPIO25", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO26 = "GPIO26", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO27 = "GPIO27", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO28 = "GPIO28", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO29 = "GPIO29", +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .GPIO2_0 = "GPIO2_0", #endif @@ -865,6 +1024,39 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .GPIO2_7 = "GPIO2_7", #endif +#if defined(IPCHW_PADMUX_FH) + .GPIO3 = "GPIO3", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO30 = "GPIO30", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO31 = "GPIO31", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO32 = "GPIO32", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO33 = "GPIO33", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO34 = "GPIO34", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO35 = "GPIO35", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO36 = "GPIO36", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO37 = "GPIO37", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO38 = "GPIO38", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO39 = "GPIO39", +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) .GPIO3_0 = "GPIO3_0", #endif @@ -889,6 +1081,39 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .GPIO3_7 = "GPIO3_7", #endif +#if defined(IPCHW_PADMUX_FH) + .GPIO4 = "GPIO4", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO40 = "GPIO40", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO41 = "GPIO41", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO42 = "GPIO42", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO43 = "GPIO43", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO44 = "GPIO44", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO45 = "GPIO45", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO46 = "GPIO46", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO47 = "GPIO47", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO48 = "GPIO48", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO49 = "GPIO49", +#endif #if defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .GPIO4_0 = "GPIO4_0", #endif @@ -913,6 +1138,39 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) .GPIO4_7 = "GPIO4_7", #endif +#if defined(IPCHW_PADMUX_FH) + .GPIO5 = "GPIO5", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO50 = "GPIO50", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO51 = "GPIO51", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO52 = "GPIO52", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO53 = "GPIO53", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO54 = "GPIO54", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO55 = "GPIO55", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO56 = "GPIO56", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO57 = "GPIO57", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO58 = "GPIO58", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO59 = "GPIO59", +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .GPIO5_0 = "GPIO5_0", #endif @@ -937,6 +1195,21 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .GPIO5_7 = "GPIO5_7", #endif +#if defined(IPCHW_PADMUX_FH) + .GPIO6 = "GPIO6", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO60 = "GPIO60", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO61 = "GPIO61", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO62 = "GPIO62", +#endif +#if defined(IPCHW_PADMUX_FH) + .GPIO63 = "GPIO63", +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .GPIO6_0 = "GPIO6_0", #endif @@ -961,6 +1234,9 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .GPIO6_7 = "GPIO6_7", #endif +#if defined(IPCHW_PADMUX_FH) + .GPIO7 = "GPIO7", +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .GPIO7_0 = "GPIO7_0", #endif @@ -985,6 +1261,9 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .GPIO7_7 = "GPIO7_7", #endif +#if defined(IPCHW_PADMUX_FH) + .GPIO8 = "GPIO8", +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) .GPIO8_0 = "GPIO8_0", #endif @@ -1009,6 +1288,9 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) .GPIO8_7 = "GPIO8_7", #endif +#if defined(IPCHW_PADMUX_FH) + .GPIO9 = "GPIO9", +#endif #if defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .GPIO9_0 = "GPIO9_0", #endif @@ -1105,10 +1387,10 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_INGENIC) .I2C0_PORTA = "I2C0_PORTA", #endif -#if defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .I2C0_SCL = "I2C0_SCL", #endif -#if defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .I2C0_SDA = "I2C0_SDA", #endif #if defined(IPCHW_PADMUX_SSTAR) @@ -1141,10 +1423,10 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_INGENIC) .I2C1_PORTC = "I2C1_PORTC", #endif -#if defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .I2C1_SCL = "I2C1_SCL", #endif -#if defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .I2C1_SDA = "I2C1_SDA", #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -1183,10 +1465,10 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_INGENIC) .I2C2_PORTB = "I2C2_PORTB", #endif -#if defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .I2C2_SCL = "I2C2_SCL", #endif -#if defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .I2C2_SDA = "I2C2_SDA", #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -1753,6 +2035,36 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_INGENIC) .MAC0_RMII_P1 = "MAC0_RMII_P1", #endif +#if defined(IPCHW_PADMUX_FH) + .MAC_MDC = "MAC_MDC", +#endif +#if defined(IPCHW_PADMUX_FH) + .MAC_MDIO = "MAC_MDIO", +#endif +#if defined(IPCHW_PADMUX_FH) + .MAC_REF_CLK = "MAC_REF_CLK", +#endif +#if defined(IPCHW_PADMUX_FH) + .MAC_RMII_CLK = "MAC_RMII_CLK", +#endif +#if defined(IPCHW_PADMUX_FH) + .MAC_RXDV = "MAC_RXDV", +#endif +#if defined(IPCHW_PADMUX_FH) + .MAC_RXD_0 = "MAC_RXD_0", +#endif +#if defined(IPCHW_PADMUX_FH) + .MAC_RXD_1 = "MAC_RXD_1", +#endif +#if defined(IPCHW_PADMUX_FH) + .MAC_TXD_0 = "MAC_TXD_0", +#endif +#if defined(IPCHW_PADMUX_FH) + .MAC_TXD_1 = "MAC_TXD_1", +#endif +#if defined(IPCHW_PADMUX_FH) + .MAC_TXEN = "MAC_TXEN", +#endif #if defined(IPCHW_PADMUX_INGENIC) .MCLK_PORTA = "MCLK_PORTA", #endif @@ -2728,6 +3040,21 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_SSTAR) || (defined(IPCHW_VENDOR_SSTAR) && !defined(STANDALONE_LIBRARY)) .PAD_USB_DP = "PAD_USB_DP", #endif +#if defined(IPCHW_PADMUX_FH) + .PAE_JTAG_TCK = "PAE_JTAG_TCK", +#endif +#if defined(IPCHW_PADMUX_FH) + .PAE_JTAG_TDI = "PAE_JTAG_TDI", +#endif +#if defined(IPCHW_PADMUX_FH) + .PAE_JTAG_TDO = "PAE_JTAG_TDO", +#endif +#if defined(IPCHW_PADMUX_FH) + .PAE_JTAG_TMS = "PAE_JTAG_TMS", +#endif +#if defined(IPCHW_PADMUX_FH) + .PAE_JTAG_TRSTN = "PAE_JTAG_TRSTN", +#endif #if defined(IPCHW_VENDOR_INGENIC) && !defined(STANDALONE_LIBRARY) .PAFLG = "PAFLG", #endif @@ -4147,7 +4474,7 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_V4) .POR_SEL = "POR_SEL", #endif -#if defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) .PWM0 = "PWM0", #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -4195,10 +4522,10 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_INGENIC) .PWM0_PC = "PWM0_PC", #endif -#if defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) .PWM1 = "PWM1", #endif -#if defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V4) .PWM10 = "PWM10", #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -4228,7 +4555,7 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_SSTAR) .PWM10_MODE_4 = "PWM10_MODE_4", #endif -#if defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V4) .PWM11 = "PWM11", #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -4306,7 +4633,7 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_INGENIC) .PWM1_PC = "PWM1_PC", #endif -#if defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) .PWM2 = "PWM2", #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -4345,7 +4672,7 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_INGENIC) .PWM2_PC = "PWM2_PC", #endif -#if defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) .PWM3 = "PWM3", #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -4384,7 +4711,7 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_INGENIC) .PWM3_PC = "PWM3_PC", #endif -#if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) .PWM4 = "PWM4", #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -4423,7 +4750,7 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_INGENIC) .PWM4_PC = "PWM4_PC", #endif -#if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) .PWM5 = "PWM5", #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -4462,7 +4789,7 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_INGENIC) .PWM5_PC = "PWM5_PC", #endif -#if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) .PWM6 = "PWM6", #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -4501,7 +4828,7 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_INGENIC) .PWM6_PD = "PWM6_PD", #endif -#if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) .PWM7 = "PWM7", #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -4540,7 +4867,7 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_INGENIC) .PWM7_PD = "PWM7_PD", #endif -#if defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V4) .PWM8 = "PWM8", #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -4582,7 +4909,7 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_SSTAR) .PWM8_MODE_8 = "PWM8_MODE_8", #endif -#if defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V4) .PWM9 = "PWM9", #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -5044,7 +5371,7 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_V4) .RST_N = "RST_N", #endif -#if defined(IPCHW_PADMUX_NOVATEK) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_NOVATEK) .RTC_CLK = "RTC_CLK", #endif #if defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2A) @@ -5080,6 +5407,18 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_INGENIC) .SA2 = "SA2", #endif +#if defined(IPCHW_PADMUX_FH) + .SADC_XAIN0 = "SADC_XAIN0", +#endif +#if defined(IPCHW_PADMUX_FH) + .SADC_XAIN1 = "SADC_XAIN1", +#endif +#if defined(IPCHW_PADMUX_FH) + .SADC_XAIN2 = "SADC_XAIN2", +#endif +#if defined(IPCHW_PADMUX_FH) + .SADC_XAIN3 = "SADC_XAIN3", +#endif #if defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) .SAR_ADC_CH0 = "SAR_ADC_CH0", #endif @@ -5170,33 +5509,81 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_INGENIC) .SD0 = "SD0", #endif +#if defined(IPCHW_PADMUX_FH) + .SD0_CD = "SD0_CD", +#endif #if defined(IPCHW_PADMUX_SSTAR) .SD0_CDZ_MODE = "SD0_CDZ_MODE", #endif #if defined(IPCHW_PADMUX_SSTAR) .SD0_CDZ_MODE_1 = "SD0_CDZ_MODE_1", #endif +#if defined(IPCHW_PADMUX_FH) + .SD0_CLK = "SD0_CLK", +#endif +#if defined(IPCHW_PADMUX_FH) + .SD0_CMD_RSP = "SD0_CMD_RSP", +#endif +#if defined(IPCHW_PADMUX_FH) + .SD0_DATA_0 = "SD0_DATA_0", +#endif +#if defined(IPCHW_PADMUX_FH) + .SD0_DATA_1 = "SD0_DATA_1", +#endif +#if defined(IPCHW_PADMUX_FH) + .SD0_DATA_2 = "SD0_DATA_2", +#endif +#if defined(IPCHW_PADMUX_FH) + .SD0_DATA_3 = "SD0_DATA_3", +#endif #if defined(IPCHW_PADMUX_SSTAR) .SD0_MODE = "SD0_MODE", #endif #if defined(IPCHW_PADMUX_SSTAR) .SD0_MODE_1 = "SD0_MODE_1", #endif +#if defined(IPCHW_PADMUX_FH) + .SD0_WP = "SD0_WP", +#endif #if defined(IPCHW_PADMUX_INGENIC) .SD1 = "SD1", #endif +#if defined(IPCHW_PADMUX_FH) + .SD1_CD = "SD1_CD", +#endif #if defined(IPCHW_PADMUX_SSTAR) .SD1_CDZ_MODE_1 = "SD1_CDZ_MODE_1", #endif #if defined(IPCHW_PADMUX_SSTAR) .SD1_CDZ_MODE_2 = "SD1_CDZ_MODE_2", #endif +#if defined(IPCHW_PADMUX_FH) + .SD1_CLK = "SD1_CLK", +#endif +#if defined(IPCHW_PADMUX_FH) + .SD1_CMD_RSP = "SD1_CMD_RSP", +#endif +#if defined(IPCHW_PADMUX_FH) + .SD1_DATA_0 = "SD1_DATA_0", +#endif +#if defined(IPCHW_PADMUX_FH) + .SD1_DATA_1 = "SD1_DATA_1", +#endif +#if defined(IPCHW_PADMUX_FH) + .SD1_DATA_2 = "SD1_DATA_2", +#endif +#if defined(IPCHW_PADMUX_FH) + .SD1_DATA_3 = "SD1_DATA_3", +#endif #if defined(IPCHW_PADMUX_SSTAR) .SD1_MODE_1 = "SD1_MODE_1", #endif #if defined(IPCHW_PADMUX_SSTAR) .SD1_MODE_2 = "SD1_MODE_2", #endif +#if defined(IPCHW_PADMUX_FH) + .SD1_WP = "SD1_WP", +#endif #if defined(IPCHW_PADMUX_INGENIC) .SD2 = "SD2", #endif @@ -5512,7 +5899,7 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_NOVATEK) .SENSOR_CCIR_2 = "SENSOR_CCIR_2", #endif -#if defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V4) .SENSOR_CLK = "SENSOR_CLK", #endif #if defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) @@ -6262,9 +6649,21 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_INGENIC) .SSI0_CE1 = "SSI0_CE1", #endif -#if defined(IPCHW_PADMUX_INGENIC) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_INGENIC) .SSI0_CLK = "SSI0_CLK", #endif +#if defined(IPCHW_PADMUX_FH) + .SSI0_CSN_0 = "SSI0_CSN_0", +#endif +#if defined(IPCHW_PADMUX_FH) + .SSI0_CSN_1 = "SSI0_CSN_1", +#endif +#if defined(IPCHW_PADMUX_FH) + .SSI0_D2 = "SSI0_D2", +#endif +#if defined(IPCHW_PADMUX_FH) + .SSI0_D3 = "SSI0_D3", +#endif #if defined(IPCHW_PADMUX_INGENIC) .SSI0_DR = "SSI0_DR", #endif @@ -6283,12 +6682,21 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_INGENIC) .SSI0_PORTC = "SSI0_PORTC", #endif +#if defined(IPCHW_PADMUX_FH) + .SSI0_RXD = "SSI0_RXD", +#endif +#if defined(IPCHW_PADMUX_FH) + .SSI0_TXD = "SSI0_TXD", +#endif #if defined(IPCHW_PADMUX_INGENIC) .SSI1_CE0 = "SSI1_CE0", #endif -#if defined(IPCHW_PADMUX_INGENIC) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_INGENIC) .SSI1_CLK = "SSI1_CLK", #endif +#if defined(IPCHW_PADMUX_FH) + .SSI1_CSN_0 = "SSI1_CSN_0", +#endif #if defined(IPCHW_PADMUX_INGENIC) .SSI1_DR = "SSI1_DR", #endif @@ -6298,6 +6706,27 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_INGENIC) .SSI1_PORTC = "SSI1_PORTC", #endif +#if defined(IPCHW_PADMUX_FH) + .SSI1_RXD = "SSI1_RXD", +#endif +#if defined(IPCHW_PADMUX_FH) + .SSI1_TXD = "SSI1_TXD", +#endif +#if defined(IPCHW_PADMUX_FH) + .SSI2_CLK = "SSI2_CLK", +#endif +#if defined(IPCHW_PADMUX_FH) + .SSI2_CSN = "SSI2_CSN", +#endif +#if defined(IPCHW_PADMUX_FH) + .SSI2_CSN_0 = "SSI2_CSN_0", +#endif +#if defined(IPCHW_PADMUX_FH) + .SSI2_RXD = "SSI2_RXD", +#endif +#if defined(IPCHW_PADMUX_FH) + .SSI2_TXD = "SSI2_TXD", +#endif #if defined(IPCHW_PADMUX_INGENIC) .SSI_SLV_CE0 = "SSI_SLV_CE0", #endif @@ -6379,6 +6808,15 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .TEST_CLK = "TEST_CLK", #endif +#if defined(IPCHW_PADMUX_FH) + .TEST_INT_RMII_TXD_0 = "TEST_INT_RMII_TXD_0", +#endif +#if defined(IPCHW_PADMUX_FH) + .TEST_INT_RMII_TXD_1 = "TEST_INT_RMII_TXD_1", +#endif +#if defined(IPCHW_PADMUX_FH) + .TEST_INT_RMII_TXEN = "TEST_INT_RMII_TXEN", +#endif #if defined(IPCHW_PADMUX_SSTAR) .TEST_IN_MODE_1 = "TEST_IN_MODE_1", #endif @@ -6388,6 +6826,12 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_SSTAR) .TEST_IN_MODE_3 = "TEST_IN_MODE_3", #endif +#if defined(IPCHW_PADMUX_FH) + .TEST_I_INT_SMI_MDC = "TEST_I_INT_SMI_MDC", +#endif +#if defined(IPCHW_PADMUX_FH) + .TEST_I_INT_SMI_MDIO_I = "TEST_I_INT_SMI_MDIO_I", +#endif #if defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .TEST_MODE = "TEST_MODE", #endif @@ -6400,6 +6844,39 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_SSTAR) .TEST_OUT_MODE_3 = "TEST_OUT_MODE_3", #endif +#if defined(IPCHW_PADMUX_FH) + .TEST_O_INT_RMII_CLK = "TEST_O_INT_RMII_CLK", +#endif +#if defined(IPCHW_PADMUX_FH) + .TEST_O_INT_RMII_CRSDV = "TEST_O_INT_RMII_CRSDV", +#endif +#if defined(IPCHW_PADMUX_FH) + .TEST_O_INT_RMII_RXD_0 = "TEST_O_INT_RMII_RXD_0", +#endif +#if defined(IPCHW_PADMUX_FH) + .TEST_O_INT_RMII_RXD_1 = "TEST_O_INT_RMII_RXD_1", +#endif +#if defined(IPCHW_PADMUX_FH) + .TEST_O_INT_RMII_TXD_0 = "TEST_O_INT_RMII_TXD_0", +#endif +#if defined(IPCHW_PADMUX_FH) + .TEST_O_INT_RMII_TXD_1 = "TEST_O_INT_RMII_TXD_1", +#endif +#if defined(IPCHW_PADMUX_FH) + .TEST_O_INT_RMII_TXEN = "TEST_O_INT_RMII_TXEN", +#endif +#if defined(IPCHW_PADMUX_FH) + .TEST_O_INT_SMI_MDC = "TEST_O_INT_SMI_MDC", +#endif +#if defined(IPCHW_PADMUX_FH) + .TEST_O_INT_SMI_MDIO_I = "TEST_O_INT_SMI_MDIO_I", +#endif +#if defined(IPCHW_PADMUX_FH) + .TEST_O_INT_SMI_MDIO_O = "TEST_O_INT_SMI_MDIO_O", +#endif +#if defined(IPCHW_PADMUX_FH) + .TEST_O_INT_SMI_MDIO_OE = "TEST_O_INT_SMI_MDIO_OE", +#endif #if defined(IPCHW_PADMUX_INGENIC) .TFT_LCD_PD = "TFT_LCD_PD", #endif @@ -6601,9 +7078,15 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_3536C) .UART0_RTSN = "UART0_RTSN", #endif +#if defined(IPCHW_PADMUX_FH) + .UART0_RX = "UART0_RX", +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .UART0_RXD = "UART0_RXD", #endif +#if defined(IPCHW_PADMUX_FH) + .UART0_TX = "UART0_TX", +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .UART0_TXD = "UART0_TXD", #endif @@ -6643,9 +7126,15 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .UART1_RTSN = "UART1_RTSN", #endif +#if defined(IPCHW_PADMUX_FH) + .UART1_RX = "UART1_RX", +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .UART1_RXD = "UART1_RXD", #endif +#if defined(IPCHW_PADMUX_FH) + .UART1_TX = "UART1_TX", +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .UART1_TXD = "UART1_TXD", #endif @@ -6718,9 +7207,15 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) .UART2_RTSN = "UART2_RTSN", #endif +#if defined(IPCHW_PADMUX_FH) + .UART2_RX = "UART2_RX", +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .UART2_RXD = "UART2_RXD", #endif +#if defined(IPCHW_PADMUX_FH) + .UART2_TX = "UART2_TX", +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .UART2_TXD = "UART2_TXD", #endif @@ -6877,10 +7372,13 @@ const struct padmux_names padmux_names = { #if defined(IPCHW_PADMUX_V4A) .USBPHY_TEST_OBS7 = "USBPHY_TEST_OBS7", #endif +#if defined(IPCHW_PADMUX_FH) + .USB_DBG_CLK = "USB_DBG_CLK", +#endif #if defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .USB_OVRCUR = "USB_OVRCUR", #endif -#if defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) .USB_PWREN = "USB_PWREN", #endif #if defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) diff --git a/src/padmux_names.h b/src/padmux_names.h index cd24c240..17b8fdbb 100644 --- a/src/padmux_names.h +++ b/src/padmux_names.h @@ -16,6 +16,72 @@ struct padmux_names { /* Offset 0 is the empty string, which is what makes 0 usable * as the end of a row's function list. */ char _none[1]; +#if defined(IPCHW_PADMUX_FH) + char ACIP_ADBCLK[sizeof "ACIP_ADBCLK"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char ACIP_ADDAT[sizeof "ACIP_ADDAT"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char ACIP_ADLRC[sizeof "ACIP_ADLRC"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char ACIP_BCLK[sizeof "ACIP_BCLK"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char ACIP_DABCLK[sizeof "ACIP_DABCLK"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char ACIP_DADAT[sizeof "ACIP_DADAT"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char ACIP_DALRC[sizeof "ACIP_DALRC"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char AC_I2S_CLK[sizeof "AC_I2S_CLK"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char AC_I2S_DI[sizeof "AC_I2S_DI"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char AC_I2S_DO[sizeof "AC_I2S_DO"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char AC_I2S_WS[sizeof "AC_I2S_WS"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char AC_MCLK[sizeof "AC_MCLK"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char ARC_JTAG_TCK[sizeof "ARC_JTAG_TCK"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char ARC_JTAG_TDI[sizeof "ARC_JTAG_TDI"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char ARC_JTAG_TDO[sizeof "ARC_JTAG_TDO"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char ARC_JTAG_TMS[sizeof "ARC_JTAG_TMS"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char ARC_JTAG_TRSTN[sizeof "ARC_JTAG_TRSTN"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char ARM_JTAG_TCK[sizeof "ARM_JTAG_TCK"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char ARM_JTAG_TDI[sizeof "ARM_JTAG_TDI"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char ARM_JTAG_TDO[sizeof "ARM_JTAG_TDO"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char ARM_JTAG_TMS[sizeof "ARM_JTAG_TMS"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char ARM_JTAG_TRSTN[sizeof "ARM_JTAG_TRSTN"]; +#endif #if defined(IPCHW_PADMUX_NOVATEK) char A_GPIO0[sizeof "A_GPIO0"]; #endif @@ -70,6 +136,9 @@ struct padmux_names { #if defined(IPCHW_PADMUX_INGENIC) char CIM2_VIC_MCLK_PC[sizeof "CIM2_VIC_MCLK_PC"]; #endif +#if defined(IPCHW_PADMUX_FH) + char CIS_CLK[sizeof "CIS_CLK"]; +#endif #if defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2A) char CLK_TEST_OUT0[sizeof "CLK_TEST_OUT0"]; #endif @@ -382,6 +451,18 @@ struct padmux_names { #if defined(IPCHW_PADMUX_INGENIC) char DVP_VSYNC[sizeof "DVP_VSYNC"]; #endif +#if defined(IPCHW_PADMUX_FH) + char DW_I2S_CLK[sizeof "DW_I2S_CLK"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char DW_I2S_DI[sizeof "DW_I2S_DI"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char DW_I2S_DO[sizeof "DW_I2S_DO"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char DW_I2S_WS[sizeof "DW_I2S_WS"]; +#endif #if defined(IPCHW_PADMUX_NOVATEK) char D_GPIO0[sizeof "D_GPIO0"]; #endif @@ -520,12 +601,21 @@ struct padmux_names { #if defined(IPCHW_PADMUX_NOVATEK) char ETH_LED2[sizeof "ETH_LED2"]; #endif +#if defined(IPCHW_PADMUX_FH) + char ETH_LINK_ACT[sizeof "ETH_LINK_ACT"]; +#endif #if defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V5) char ETH_LINK_ACT_LED[sizeof "ETH_LINK_ACT_LED"]; #endif #if defined(IPCHW_PADMUX_3536D) char ETH_LINK_LED[sizeof "ETH_LINK_LED"]; #endif +#if defined(IPCHW_PADMUX_FH) + char ETH_LINK_SPD[sizeof "ETH_LINK_SPD"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char ETH_LINK_STA[sizeof "ETH_LINK_STA"]; +#endif #if defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V5) char ETH_LINK_STA_LED[sizeof "ETH_LINK_STA_LED"]; #endif @@ -661,6 +751,9 @@ struct padmux_names { #if defined(IPCHW_PADMUX_INGENIC) char GMAC_TXEN[sizeof "GMAC_TXEN"]; #endif +#if defined(IPCHW_PADMUX_FH) + char GPIO0[sizeof "GPIO0"]; +#endif #if defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char GPIO0_0[sizeof "GPIO0_0"]; #endif @@ -685,6 +778,12 @@ struct padmux_names { #if defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char GPIO0_7[sizeof "GPIO0_7"]; #endif +#if defined(IPCHW_PADMUX_FH) + char GPIO1[sizeof "GPIO1"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO10[sizeof "GPIO10"]; +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4A) char GPIO10_0[sizeof "GPIO10_0"]; #endif @@ -709,6 +808,9 @@ struct padmux_names { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4A) char GPIO10_7[sizeof "GPIO10_7"]; #endif +#if defined(IPCHW_PADMUX_FH) + char GPIO11[sizeof "GPIO11"]; +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4A) char GPIO11_0[sizeof "GPIO11_0"]; #endif @@ -733,6 +835,9 @@ struct padmux_names { #if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) char GPIO11_7[sizeof "GPIO11_7"]; #endif +#if defined(IPCHW_PADMUX_FH) + char GPIO12[sizeof "GPIO12"]; +#endif #if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) char GPIO12_0[sizeof "GPIO12_0"]; #endif @@ -757,6 +862,9 @@ struct padmux_names { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) char GPIO12_7[sizeof "GPIO12_7"]; #endif +#if defined(IPCHW_PADMUX_FH) + char GPIO13[sizeof "GPIO13"]; +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V2A) char GPIO13_0[sizeof "GPIO13_0"]; #endif @@ -781,6 +889,9 @@ struct padmux_names { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V5) char GPIO13_7[sizeof "GPIO13_7"]; #endif +#if defined(IPCHW_PADMUX_FH) + char GPIO14[sizeof "GPIO14"]; +#endif #if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V5) char GPIO14_0[sizeof "GPIO14_0"]; #endif @@ -805,6 +916,9 @@ struct padmux_names { #if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V5) char GPIO14_7[sizeof "GPIO14_7"]; #endif +#if defined(IPCHW_PADMUX_FH) + char GPIO15[sizeof "GPIO15"]; +#endif #if defined(IPCHW_PADMUX_V2A) char GPIO15_0[sizeof "GPIO15_0"]; #endif @@ -814,6 +928,9 @@ struct padmux_names { #if defined(IPCHW_PADMUX_V2A) char GPIO15_2[sizeof "GPIO15_2"]; #endif +#if defined(IPCHW_PADMUX_FH) + char GPIO16[sizeof "GPIO16"]; +#endif #if defined(IPCHW_PADMUX_V3A) char GPIO16_1[sizeof "GPIO16_1"]; #endif @@ -823,6 +940,15 @@ struct padmux_names { #if defined(IPCHW_PADMUX_V3A) char GPIO16_3[sizeof "GPIO16_3"]; #endif +#if defined(IPCHW_PADMUX_FH) + char GPIO17[sizeof "GPIO17"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO18[sizeof "GPIO18"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO19[sizeof "GPIO19"]; +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char GPIO1_0[sizeof "GPIO1_0"]; #endif @@ -847,6 +973,39 @@ struct padmux_names { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char GPIO1_7[sizeof "GPIO1_7"]; #endif +#if defined(IPCHW_PADMUX_FH) + char GPIO2[sizeof "GPIO2"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO20[sizeof "GPIO20"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO21[sizeof "GPIO21"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO22[sizeof "GPIO22"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO23[sizeof "GPIO23"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO24[sizeof "GPIO24"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO25[sizeof "GPIO25"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO26[sizeof "GPIO26"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO27[sizeof "GPIO27"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO28[sizeof "GPIO28"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO29[sizeof "GPIO29"]; +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char GPIO2_0[sizeof "GPIO2_0"]; #endif @@ -871,6 +1030,39 @@ struct padmux_names { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char GPIO2_7[sizeof "GPIO2_7"]; #endif +#if defined(IPCHW_PADMUX_FH) + char GPIO3[sizeof "GPIO3"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO30[sizeof "GPIO30"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO31[sizeof "GPIO31"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO32[sizeof "GPIO32"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO33[sizeof "GPIO33"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO34[sizeof "GPIO34"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO35[sizeof "GPIO35"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO36[sizeof "GPIO36"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO37[sizeof "GPIO37"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO38[sizeof "GPIO38"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO39[sizeof "GPIO39"]; +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) char GPIO3_0[sizeof "GPIO3_0"]; #endif @@ -895,6 +1087,39 @@ struct padmux_names { #if defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char GPIO3_7[sizeof "GPIO3_7"]; #endif +#if defined(IPCHW_PADMUX_FH) + char GPIO4[sizeof "GPIO4"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO40[sizeof "GPIO40"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO41[sizeof "GPIO41"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO42[sizeof "GPIO42"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO43[sizeof "GPIO43"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO44[sizeof "GPIO44"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO45[sizeof "GPIO45"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO46[sizeof "GPIO46"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO47[sizeof "GPIO47"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO48[sizeof "GPIO48"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO49[sizeof "GPIO49"]; +#endif #if defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char GPIO4_0[sizeof "GPIO4_0"]; #endif @@ -919,6 +1144,39 @@ struct padmux_names { #if defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) char GPIO4_7[sizeof "GPIO4_7"]; #endif +#if defined(IPCHW_PADMUX_FH) + char GPIO5[sizeof "GPIO5"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO50[sizeof "GPIO50"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO51[sizeof "GPIO51"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO52[sizeof "GPIO52"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO53[sizeof "GPIO53"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO54[sizeof "GPIO54"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO55[sizeof "GPIO55"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO56[sizeof "GPIO56"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO57[sizeof "GPIO57"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO58[sizeof "GPIO58"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO59[sizeof "GPIO59"]; +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char GPIO5_0[sizeof "GPIO5_0"]; #endif @@ -943,6 +1201,21 @@ struct padmux_names { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char GPIO5_7[sizeof "GPIO5_7"]; #endif +#if defined(IPCHW_PADMUX_FH) + char GPIO6[sizeof "GPIO6"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO60[sizeof "GPIO60"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO61[sizeof "GPIO61"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO62[sizeof "GPIO62"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char GPIO63[sizeof "GPIO63"]; +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char GPIO6_0[sizeof "GPIO6_0"]; #endif @@ -967,6 +1240,9 @@ struct padmux_names { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char GPIO6_7[sizeof "GPIO6_7"]; #endif +#if defined(IPCHW_PADMUX_FH) + char GPIO7[sizeof "GPIO7"]; +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char GPIO7_0[sizeof "GPIO7_0"]; #endif @@ -991,6 +1267,9 @@ struct padmux_names { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char GPIO7_7[sizeof "GPIO7_7"]; #endif +#if defined(IPCHW_PADMUX_FH) + char GPIO8[sizeof "GPIO8"]; +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) char GPIO8_0[sizeof "GPIO8_0"]; #endif @@ -1015,6 +1294,9 @@ struct padmux_names { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) char GPIO8_7[sizeof "GPIO8_7"]; #endif +#if defined(IPCHW_PADMUX_FH) + char GPIO9[sizeof "GPIO9"]; +#endif #if defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char GPIO9_0[sizeof "GPIO9_0"]; #endif @@ -1111,10 +1393,10 @@ struct padmux_names { #if defined(IPCHW_PADMUX_INGENIC) char I2C0_PORTA[sizeof "I2C0_PORTA"]; #endif -#if defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char I2C0_SCL[sizeof "I2C0_SCL"]; #endif -#if defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char I2C0_SDA[sizeof "I2C0_SDA"]; #endif #if defined(IPCHW_PADMUX_SSTAR) @@ -1147,10 +1429,10 @@ struct padmux_names { #if defined(IPCHW_PADMUX_INGENIC) char I2C1_PORTC[sizeof "I2C1_PORTC"]; #endif -#if defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char I2C1_SCL[sizeof "I2C1_SCL"]; #endif -#if defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char I2C1_SDA[sizeof "I2C1_SDA"]; #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -1189,10 +1471,10 @@ struct padmux_names { #if defined(IPCHW_PADMUX_INGENIC) char I2C2_PORTB[sizeof "I2C2_PORTB"]; #endif -#if defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char I2C2_SCL[sizeof "I2C2_SCL"]; #endif -#if defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char I2C2_SDA[sizeof "I2C2_SDA"]; #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -1759,6 +2041,36 @@ struct padmux_names { #if defined(IPCHW_PADMUX_INGENIC) char MAC0_RMII_P1[sizeof "MAC0_RMII_P1"]; #endif +#if defined(IPCHW_PADMUX_FH) + char MAC_MDC[sizeof "MAC_MDC"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char MAC_MDIO[sizeof "MAC_MDIO"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char MAC_REF_CLK[sizeof "MAC_REF_CLK"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char MAC_RMII_CLK[sizeof "MAC_RMII_CLK"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char MAC_RXDV[sizeof "MAC_RXDV"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char MAC_RXD_0[sizeof "MAC_RXD_0"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char MAC_RXD_1[sizeof "MAC_RXD_1"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char MAC_TXD_0[sizeof "MAC_TXD_0"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char MAC_TXD_1[sizeof "MAC_TXD_1"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char MAC_TXEN[sizeof "MAC_TXEN"]; +#endif #if defined(IPCHW_PADMUX_INGENIC) char MCLK_PORTA[sizeof "MCLK_PORTA"]; #endif @@ -2734,6 +3046,21 @@ struct padmux_names { #if defined(IPCHW_PADMUX_SSTAR) || (defined(IPCHW_VENDOR_SSTAR) && !defined(STANDALONE_LIBRARY)) char PAD_USB_DP[sizeof "PAD_USB_DP"]; #endif +#if defined(IPCHW_PADMUX_FH) + char PAE_JTAG_TCK[sizeof "PAE_JTAG_TCK"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char PAE_JTAG_TDI[sizeof "PAE_JTAG_TDI"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char PAE_JTAG_TDO[sizeof "PAE_JTAG_TDO"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char PAE_JTAG_TMS[sizeof "PAE_JTAG_TMS"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char PAE_JTAG_TRSTN[sizeof "PAE_JTAG_TRSTN"]; +#endif #if defined(IPCHW_VENDOR_INGENIC) && !defined(STANDALONE_LIBRARY) char PAFLG[sizeof "PAFLG"]; #endif @@ -4153,7 +4480,7 @@ struct padmux_names { #if defined(IPCHW_PADMUX_V4) char POR_SEL[sizeof "POR_SEL"]; #endif -#if defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) char PWM0[sizeof "PWM0"]; #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -4201,10 +4528,10 @@ struct padmux_names { #if defined(IPCHW_PADMUX_INGENIC) char PWM0_PC[sizeof "PWM0_PC"]; #endif -#if defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) char PWM1[sizeof "PWM1"]; #endif -#if defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V4) char PWM10[sizeof "PWM10"]; #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -4234,7 +4561,7 @@ struct padmux_names { #if defined(IPCHW_PADMUX_SSTAR) char PWM10_MODE_4[sizeof "PWM10_MODE_4"]; #endif -#if defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V4) char PWM11[sizeof "PWM11"]; #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -4312,7 +4639,7 @@ struct padmux_names { #if defined(IPCHW_PADMUX_INGENIC) char PWM1_PC[sizeof "PWM1_PC"]; #endif -#if defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) char PWM2[sizeof "PWM2"]; #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -4351,7 +4678,7 @@ struct padmux_names { #if defined(IPCHW_PADMUX_INGENIC) char PWM2_PC[sizeof "PWM2_PC"]; #endif -#if defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) char PWM3[sizeof "PWM3"]; #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -4390,7 +4717,7 @@ struct padmux_names { #if defined(IPCHW_PADMUX_INGENIC) char PWM3_PC[sizeof "PWM3_PC"]; #endif -#if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) char PWM4[sizeof "PWM4"]; #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -4429,7 +4756,7 @@ struct padmux_names { #if defined(IPCHW_PADMUX_INGENIC) char PWM4_PC[sizeof "PWM4_PC"]; #endif -#if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) char PWM5[sizeof "PWM5"]; #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -4468,7 +4795,7 @@ struct padmux_names { #if defined(IPCHW_PADMUX_INGENIC) char PWM5_PC[sizeof "PWM5_PC"]; #endif -#if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) char PWM6[sizeof "PWM6"]; #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -4507,7 +4834,7 @@ struct padmux_names { #if defined(IPCHW_PADMUX_INGENIC) char PWM6_PD[sizeof "PWM6_PD"]; #endif -#if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) char PWM7[sizeof "PWM7"]; #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -4546,7 +4873,7 @@ struct padmux_names { #if defined(IPCHW_PADMUX_INGENIC) char PWM7_PD[sizeof "PWM7_PD"]; #endif -#if defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V4) char PWM8[sizeof "PWM8"]; #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -4588,7 +4915,7 @@ struct padmux_names { #if defined(IPCHW_PADMUX_SSTAR) char PWM8_MODE_8[sizeof "PWM8_MODE_8"]; #endif -#if defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V4) char PWM9[sizeof "PWM9"]; #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -5050,7 +5377,7 @@ struct padmux_names { #if defined(IPCHW_PADMUX_V4) char RST_N[sizeof "RST_N"]; #endif -#if defined(IPCHW_PADMUX_NOVATEK) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_NOVATEK) char RTC_CLK[sizeof "RTC_CLK"]; #endif #if defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2A) @@ -5086,6 +5413,18 @@ struct padmux_names { #if defined(IPCHW_PADMUX_INGENIC) char SA2[sizeof "SA2"]; #endif +#if defined(IPCHW_PADMUX_FH) + char SADC_XAIN0[sizeof "SADC_XAIN0"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SADC_XAIN1[sizeof "SADC_XAIN1"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SADC_XAIN2[sizeof "SADC_XAIN2"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SADC_XAIN3[sizeof "SADC_XAIN3"]; +#endif #if defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) char SAR_ADC_CH0[sizeof "SAR_ADC_CH0"]; #endif @@ -5176,33 +5515,81 @@ struct padmux_names { #if defined(IPCHW_PADMUX_INGENIC) char SD0[sizeof "SD0"]; #endif +#if defined(IPCHW_PADMUX_FH) + char SD0_CD[sizeof "SD0_CD"]; +#endif #if defined(IPCHW_PADMUX_SSTAR) char SD0_CDZ_MODE[sizeof "SD0_CDZ_MODE"]; #endif #if defined(IPCHW_PADMUX_SSTAR) char SD0_CDZ_MODE_1[sizeof "SD0_CDZ_MODE_1"]; #endif +#if defined(IPCHW_PADMUX_FH) + char SD0_CLK[sizeof "SD0_CLK"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SD0_CMD_RSP[sizeof "SD0_CMD_RSP"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SD0_DATA_0[sizeof "SD0_DATA_0"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SD0_DATA_1[sizeof "SD0_DATA_1"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SD0_DATA_2[sizeof "SD0_DATA_2"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SD0_DATA_3[sizeof "SD0_DATA_3"]; +#endif #if defined(IPCHW_PADMUX_SSTAR) char SD0_MODE[sizeof "SD0_MODE"]; #endif #if defined(IPCHW_PADMUX_SSTAR) char SD0_MODE_1[sizeof "SD0_MODE_1"]; #endif +#if defined(IPCHW_PADMUX_FH) + char SD0_WP[sizeof "SD0_WP"]; +#endif #if defined(IPCHW_PADMUX_INGENIC) char SD1[sizeof "SD1"]; #endif +#if defined(IPCHW_PADMUX_FH) + char SD1_CD[sizeof "SD1_CD"]; +#endif #if defined(IPCHW_PADMUX_SSTAR) char SD1_CDZ_MODE_1[sizeof "SD1_CDZ_MODE_1"]; #endif #if defined(IPCHW_PADMUX_SSTAR) char SD1_CDZ_MODE_2[sizeof "SD1_CDZ_MODE_2"]; #endif +#if defined(IPCHW_PADMUX_FH) + char SD1_CLK[sizeof "SD1_CLK"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SD1_CMD_RSP[sizeof "SD1_CMD_RSP"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SD1_DATA_0[sizeof "SD1_DATA_0"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SD1_DATA_1[sizeof "SD1_DATA_1"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SD1_DATA_2[sizeof "SD1_DATA_2"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SD1_DATA_3[sizeof "SD1_DATA_3"]; +#endif #if defined(IPCHW_PADMUX_SSTAR) char SD1_MODE_1[sizeof "SD1_MODE_1"]; #endif #if defined(IPCHW_PADMUX_SSTAR) char SD1_MODE_2[sizeof "SD1_MODE_2"]; #endif +#if defined(IPCHW_PADMUX_FH) + char SD1_WP[sizeof "SD1_WP"]; +#endif #if defined(IPCHW_PADMUX_INGENIC) char SD2[sizeof "SD2"]; #endif @@ -5518,7 +5905,7 @@ struct padmux_names { #if defined(IPCHW_PADMUX_NOVATEK) char SENSOR_CCIR_2[sizeof "SENSOR_CCIR_2"]; #endif -#if defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V4) char SENSOR_CLK[sizeof "SENSOR_CLK"]; #endif #if defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) @@ -6268,9 +6655,21 @@ struct padmux_names { #if defined(IPCHW_PADMUX_INGENIC) char SSI0_CE1[sizeof "SSI0_CE1"]; #endif -#if defined(IPCHW_PADMUX_INGENIC) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_INGENIC) char SSI0_CLK[sizeof "SSI0_CLK"]; #endif +#if defined(IPCHW_PADMUX_FH) + char SSI0_CSN_0[sizeof "SSI0_CSN_0"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SSI0_CSN_1[sizeof "SSI0_CSN_1"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SSI0_D2[sizeof "SSI0_D2"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SSI0_D3[sizeof "SSI0_D3"]; +#endif #if defined(IPCHW_PADMUX_INGENIC) char SSI0_DR[sizeof "SSI0_DR"]; #endif @@ -6289,12 +6688,21 @@ struct padmux_names { #if defined(IPCHW_PADMUX_INGENIC) char SSI0_PORTC[sizeof "SSI0_PORTC"]; #endif +#if defined(IPCHW_PADMUX_FH) + char SSI0_RXD[sizeof "SSI0_RXD"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SSI0_TXD[sizeof "SSI0_TXD"]; +#endif #if defined(IPCHW_PADMUX_INGENIC) char SSI1_CE0[sizeof "SSI1_CE0"]; #endif -#if defined(IPCHW_PADMUX_INGENIC) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_INGENIC) char SSI1_CLK[sizeof "SSI1_CLK"]; #endif +#if defined(IPCHW_PADMUX_FH) + char SSI1_CSN_0[sizeof "SSI1_CSN_0"]; +#endif #if defined(IPCHW_PADMUX_INGENIC) char SSI1_DR[sizeof "SSI1_DR"]; #endif @@ -6304,6 +6712,27 @@ struct padmux_names { #if defined(IPCHW_PADMUX_INGENIC) char SSI1_PORTC[sizeof "SSI1_PORTC"]; #endif +#if defined(IPCHW_PADMUX_FH) + char SSI1_RXD[sizeof "SSI1_RXD"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SSI1_TXD[sizeof "SSI1_TXD"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SSI2_CLK[sizeof "SSI2_CLK"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SSI2_CSN[sizeof "SSI2_CSN"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SSI2_CSN_0[sizeof "SSI2_CSN_0"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SSI2_RXD[sizeof "SSI2_RXD"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char SSI2_TXD[sizeof "SSI2_TXD"]; +#endif #if defined(IPCHW_PADMUX_INGENIC) char SSI_SLV_CE0[sizeof "SSI_SLV_CE0"]; #endif @@ -6385,6 +6814,15 @@ struct padmux_names { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char TEST_CLK[sizeof "TEST_CLK"]; #endif +#if defined(IPCHW_PADMUX_FH) + char TEST_INT_RMII_TXD_0[sizeof "TEST_INT_RMII_TXD_0"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char TEST_INT_RMII_TXD_1[sizeof "TEST_INT_RMII_TXD_1"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char TEST_INT_RMII_TXEN[sizeof "TEST_INT_RMII_TXEN"]; +#endif #if defined(IPCHW_PADMUX_SSTAR) char TEST_IN_MODE_1[sizeof "TEST_IN_MODE_1"]; #endif @@ -6394,6 +6832,12 @@ struct padmux_names { #if defined(IPCHW_PADMUX_SSTAR) char TEST_IN_MODE_3[sizeof "TEST_IN_MODE_3"]; #endif +#if defined(IPCHW_PADMUX_FH) + char TEST_I_INT_SMI_MDC[sizeof "TEST_I_INT_SMI_MDC"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char TEST_I_INT_SMI_MDIO_I[sizeof "TEST_I_INT_SMI_MDIO_I"]; +#endif #if defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char TEST_MODE[sizeof "TEST_MODE"]; #endif @@ -6406,6 +6850,39 @@ struct padmux_names { #if defined(IPCHW_PADMUX_SSTAR) char TEST_OUT_MODE_3[sizeof "TEST_OUT_MODE_3"]; #endif +#if defined(IPCHW_PADMUX_FH) + char TEST_O_INT_RMII_CLK[sizeof "TEST_O_INT_RMII_CLK"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char TEST_O_INT_RMII_CRSDV[sizeof "TEST_O_INT_RMII_CRSDV"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char TEST_O_INT_RMII_RXD_0[sizeof "TEST_O_INT_RMII_RXD_0"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char TEST_O_INT_RMII_RXD_1[sizeof "TEST_O_INT_RMII_RXD_1"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char TEST_O_INT_RMII_TXD_0[sizeof "TEST_O_INT_RMII_TXD_0"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char TEST_O_INT_RMII_TXD_1[sizeof "TEST_O_INT_RMII_TXD_1"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char TEST_O_INT_RMII_TXEN[sizeof "TEST_O_INT_RMII_TXEN"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char TEST_O_INT_SMI_MDC[sizeof "TEST_O_INT_SMI_MDC"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char TEST_O_INT_SMI_MDIO_I[sizeof "TEST_O_INT_SMI_MDIO_I"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char TEST_O_INT_SMI_MDIO_O[sizeof "TEST_O_INT_SMI_MDIO_O"]; +#endif +#if defined(IPCHW_PADMUX_FH) + char TEST_O_INT_SMI_MDIO_OE[sizeof "TEST_O_INT_SMI_MDIO_OE"]; +#endif #if defined(IPCHW_PADMUX_INGENIC) char TFT_LCD_PD[sizeof "TFT_LCD_PD"]; #endif @@ -6607,9 +7084,15 @@ struct padmux_names { #if defined(IPCHW_PADMUX_3536C) char UART0_RTSN[sizeof "UART0_RTSN"]; #endif +#if defined(IPCHW_PADMUX_FH) + char UART0_RX[sizeof "UART0_RX"]; +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char UART0_RXD[sizeof "UART0_RXD"]; #endif +#if defined(IPCHW_PADMUX_FH) + char UART0_TX[sizeof "UART0_TX"]; +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char UART0_TXD[sizeof "UART0_TXD"]; #endif @@ -6649,9 +7132,15 @@ struct padmux_names { #if defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char UART1_RTSN[sizeof "UART1_RTSN"]; #endif +#if defined(IPCHW_PADMUX_FH) + char UART1_RX[sizeof "UART1_RX"]; +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char UART1_RXD[sizeof "UART1_RXD"]; #endif +#if defined(IPCHW_PADMUX_FH) + char UART1_TX[sizeof "UART1_TX"]; +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char UART1_TXD[sizeof "UART1_TXD"]; #endif @@ -6724,9 +7213,15 @@ struct padmux_names { #if defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) char UART2_RTSN[sizeof "UART2_RTSN"]; #endif +#if defined(IPCHW_PADMUX_FH) + char UART2_RX[sizeof "UART2_RX"]; +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char UART2_RXD[sizeof "UART2_RXD"]; #endif +#if defined(IPCHW_PADMUX_FH) + char UART2_TX[sizeof "UART2_TX"]; +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char UART2_TXD[sizeof "UART2_TXD"]; #endif @@ -6883,10 +7378,13 @@ struct padmux_names { #if defined(IPCHW_PADMUX_V4A) char USBPHY_TEST_OBS7[sizeof "USBPHY_TEST_OBS7"]; #endif +#if defined(IPCHW_PADMUX_FH) + char USB_DBG_CLK[sizeof "USB_DBG_CLK"]; +#endif #if defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char USB_OVRCUR[sizeof "USB_OVRCUR"]; #endif -#if defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) char USB_PWREN[sizeof "USB_PWREN"]; #endif #if defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) @@ -7477,6 +7975,72 @@ static inline const char *padmux_name(uint16_t off) { return (const char *)&padmux_names + off; } +#if defined(IPCHW_PADMUX_FH) +#define PMX_ACIP_ADBCLK ((uint16_t)offsetof(struct padmux_names, ACIP_ADBCLK)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_ACIP_ADDAT ((uint16_t)offsetof(struct padmux_names, ACIP_ADDAT)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_ACIP_ADLRC ((uint16_t)offsetof(struct padmux_names, ACIP_ADLRC)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_ACIP_BCLK ((uint16_t)offsetof(struct padmux_names, ACIP_BCLK)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_ACIP_DABCLK ((uint16_t)offsetof(struct padmux_names, ACIP_DABCLK)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_ACIP_DADAT ((uint16_t)offsetof(struct padmux_names, ACIP_DADAT)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_ACIP_DALRC ((uint16_t)offsetof(struct padmux_names, ACIP_DALRC)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_AC_I2S_CLK ((uint16_t)offsetof(struct padmux_names, AC_I2S_CLK)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_AC_I2S_DI ((uint16_t)offsetof(struct padmux_names, AC_I2S_DI)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_AC_I2S_DO ((uint16_t)offsetof(struct padmux_names, AC_I2S_DO)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_AC_I2S_WS ((uint16_t)offsetof(struct padmux_names, AC_I2S_WS)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_AC_MCLK ((uint16_t)offsetof(struct padmux_names, AC_MCLK)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_ARC_JTAG_TCK ((uint16_t)offsetof(struct padmux_names, ARC_JTAG_TCK)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_ARC_JTAG_TDI ((uint16_t)offsetof(struct padmux_names, ARC_JTAG_TDI)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_ARC_JTAG_TDO ((uint16_t)offsetof(struct padmux_names, ARC_JTAG_TDO)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_ARC_JTAG_TMS ((uint16_t)offsetof(struct padmux_names, ARC_JTAG_TMS)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_ARC_JTAG_TRSTN ((uint16_t)offsetof(struct padmux_names, ARC_JTAG_TRSTN)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_ARM_JTAG_TCK ((uint16_t)offsetof(struct padmux_names, ARM_JTAG_TCK)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_ARM_JTAG_TDI ((uint16_t)offsetof(struct padmux_names, ARM_JTAG_TDI)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_ARM_JTAG_TDO ((uint16_t)offsetof(struct padmux_names, ARM_JTAG_TDO)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_ARM_JTAG_TMS ((uint16_t)offsetof(struct padmux_names, ARM_JTAG_TMS)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_ARM_JTAG_TRSTN ((uint16_t)offsetof(struct padmux_names, ARM_JTAG_TRSTN)) +#endif #if defined(IPCHW_PADMUX_NOVATEK) #define PMX_A_GPIO0 ((uint16_t)offsetof(struct padmux_names, A_GPIO0)) #endif @@ -7531,6 +8095,9 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_INGENIC) #define PMX_CIM2_VIC_MCLK_PC ((uint16_t)offsetof(struct padmux_names, CIM2_VIC_MCLK_PC)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_CIS_CLK ((uint16_t)offsetof(struct padmux_names, CIS_CLK)) +#endif #if defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2A) #define PMX_CLK_TEST_OUT0 ((uint16_t)offsetof(struct padmux_names, CLK_TEST_OUT0)) #endif @@ -7843,6 +8410,18 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_INGENIC) #define PMX_DVP_VSYNC ((uint16_t)offsetof(struct padmux_names, DVP_VSYNC)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_DW_I2S_CLK ((uint16_t)offsetof(struct padmux_names, DW_I2S_CLK)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_DW_I2S_DI ((uint16_t)offsetof(struct padmux_names, DW_I2S_DI)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_DW_I2S_DO ((uint16_t)offsetof(struct padmux_names, DW_I2S_DO)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_DW_I2S_WS ((uint16_t)offsetof(struct padmux_names, DW_I2S_WS)) +#endif #if defined(IPCHW_PADMUX_NOVATEK) #define PMX_D_GPIO0 ((uint16_t)offsetof(struct padmux_names, D_GPIO0)) #endif @@ -7981,12 +8560,21 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_NOVATEK) #define PMX_ETH_LED2 ((uint16_t)offsetof(struct padmux_names, ETH_LED2)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_ETH_LINK_ACT ((uint16_t)offsetof(struct padmux_names, ETH_LINK_ACT)) +#endif #if defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V5) #define PMX_ETH_LINK_ACT_LED ((uint16_t)offsetof(struct padmux_names, ETH_LINK_ACT_LED)) #endif #if defined(IPCHW_PADMUX_3536D) #define PMX_ETH_LINK_LED ((uint16_t)offsetof(struct padmux_names, ETH_LINK_LED)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_ETH_LINK_SPD ((uint16_t)offsetof(struct padmux_names, ETH_LINK_SPD)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_ETH_LINK_STA ((uint16_t)offsetof(struct padmux_names, ETH_LINK_STA)) +#endif #if defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V5) #define PMX_ETH_LINK_STA_LED ((uint16_t)offsetof(struct padmux_names, ETH_LINK_STA_LED)) #endif @@ -8122,6 +8710,9 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_INGENIC) #define PMX_GMAC_TXEN ((uint16_t)offsetof(struct padmux_names, GMAC_TXEN)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO0 ((uint16_t)offsetof(struct padmux_names, GPIO0)) +#endif #if defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_GPIO0_0 ((uint16_t)offsetof(struct padmux_names, GPIO0_0)) #endif @@ -8146,6 +8737,12 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_GPIO0_7 ((uint16_t)offsetof(struct padmux_names, GPIO0_7)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO1 ((uint16_t)offsetof(struct padmux_names, GPIO1)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO10 ((uint16_t)offsetof(struct padmux_names, GPIO10)) +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4A) #define PMX_GPIO10_0 ((uint16_t)offsetof(struct padmux_names, GPIO10_0)) #endif @@ -8170,6 +8767,9 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4A) #define PMX_GPIO10_7 ((uint16_t)offsetof(struct padmux_names, GPIO10_7)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO11 ((uint16_t)offsetof(struct padmux_names, GPIO11)) +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4A) #define PMX_GPIO11_0 ((uint16_t)offsetof(struct padmux_names, GPIO11_0)) #endif @@ -8194,6 +8794,9 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) #define PMX_GPIO11_7 ((uint16_t)offsetof(struct padmux_names, GPIO11_7)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO12 ((uint16_t)offsetof(struct padmux_names, GPIO12)) +#endif #if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) #define PMX_GPIO12_0 ((uint16_t)offsetof(struct padmux_names, GPIO12_0)) #endif @@ -8218,6 +8821,9 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) #define PMX_GPIO12_7 ((uint16_t)offsetof(struct padmux_names, GPIO12_7)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO13 ((uint16_t)offsetof(struct padmux_names, GPIO13)) +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V2A) #define PMX_GPIO13_0 ((uint16_t)offsetof(struct padmux_names, GPIO13_0)) #endif @@ -8242,6 +8848,9 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V5) #define PMX_GPIO13_7 ((uint16_t)offsetof(struct padmux_names, GPIO13_7)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO14 ((uint16_t)offsetof(struct padmux_names, GPIO14)) +#endif #if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V5) #define PMX_GPIO14_0 ((uint16_t)offsetof(struct padmux_names, GPIO14_0)) #endif @@ -8266,6 +8875,9 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V5) #define PMX_GPIO14_7 ((uint16_t)offsetof(struct padmux_names, GPIO14_7)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO15 ((uint16_t)offsetof(struct padmux_names, GPIO15)) +#endif #if defined(IPCHW_PADMUX_V2A) #define PMX_GPIO15_0 ((uint16_t)offsetof(struct padmux_names, GPIO15_0)) #endif @@ -8275,6 +8887,9 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_V2A) #define PMX_GPIO15_2 ((uint16_t)offsetof(struct padmux_names, GPIO15_2)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO16 ((uint16_t)offsetof(struct padmux_names, GPIO16)) +#endif #if defined(IPCHW_PADMUX_V3A) #define PMX_GPIO16_1 ((uint16_t)offsetof(struct padmux_names, GPIO16_1)) #endif @@ -8284,6 +8899,15 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_V3A) #define PMX_GPIO16_3 ((uint16_t)offsetof(struct padmux_names, GPIO16_3)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO17 ((uint16_t)offsetof(struct padmux_names, GPIO17)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO18 ((uint16_t)offsetof(struct padmux_names, GPIO18)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO19 ((uint16_t)offsetof(struct padmux_names, GPIO19)) +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_GPIO1_0 ((uint16_t)offsetof(struct padmux_names, GPIO1_0)) #endif @@ -8308,6 +8932,39 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_GPIO1_7 ((uint16_t)offsetof(struct padmux_names, GPIO1_7)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO2 ((uint16_t)offsetof(struct padmux_names, GPIO2)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO20 ((uint16_t)offsetof(struct padmux_names, GPIO20)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO21 ((uint16_t)offsetof(struct padmux_names, GPIO21)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO22 ((uint16_t)offsetof(struct padmux_names, GPIO22)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO23 ((uint16_t)offsetof(struct padmux_names, GPIO23)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO24 ((uint16_t)offsetof(struct padmux_names, GPIO24)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO25 ((uint16_t)offsetof(struct padmux_names, GPIO25)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO26 ((uint16_t)offsetof(struct padmux_names, GPIO26)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO27 ((uint16_t)offsetof(struct padmux_names, GPIO27)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO28 ((uint16_t)offsetof(struct padmux_names, GPIO28)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO29 ((uint16_t)offsetof(struct padmux_names, GPIO29)) +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_GPIO2_0 ((uint16_t)offsetof(struct padmux_names, GPIO2_0)) #endif @@ -8332,6 +8989,39 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_GPIO2_7 ((uint16_t)offsetof(struct padmux_names, GPIO2_7)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO3 ((uint16_t)offsetof(struct padmux_names, GPIO3)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO30 ((uint16_t)offsetof(struct padmux_names, GPIO30)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO31 ((uint16_t)offsetof(struct padmux_names, GPIO31)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO32 ((uint16_t)offsetof(struct padmux_names, GPIO32)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO33 ((uint16_t)offsetof(struct padmux_names, GPIO33)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO34 ((uint16_t)offsetof(struct padmux_names, GPIO34)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO35 ((uint16_t)offsetof(struct padmux_names, GPIO35)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO36 ((uint16_t)offsetof(struct padmux_names, GPIO36)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO37 ((uint16_t)offsetof(struct padmux_names, GPIO37)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO38 ((uint16_t)offsetof(struct padmux_names, GPIO38)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO39 ((uint16_t)offsetof(struct padmux_names, GPIO39)) +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) #define PMX_GPIO3_0 ((uint16_t)offsetof(struct padmux_names, GPIO3_0)) #endif @@ -8356,6 +9046,39 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_GPIO3_7 ((uint16_t)offsetof(struct padmux_names, GPIO3_7)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO4 ((uint16_t)offsetof(struct padmux_names, GPIO4)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO40 ((uint16_t)offsetof(struct padmux_names, GPIO40)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO41 ((uint16_t)offsetof(struct padmux_names, GPIO41)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO42 ((uint16_t)offsetof(struct padmux_names, GPIO42)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO43 ((uint16_t)offsetof(struct padmux_names, GPIO43)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO44 ((uint16_t)offsetof(struct padmux_names, GPIO44)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO45 ((uint16_t)offsetof(struct padmux_names, GPIO45)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO46 ((uint16_t)offsetof(struct padmux_names, GPIO46)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO47 ((uint16_t)offsetof(struct padmux_names, GPIO47)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO48 ((uint16_t)offsetof(struct padmux_names, GPIO48)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO49 ((uint16_t)offsetof(struct padmux_names, GPIO49)) +#endif #if defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_GPIO4_0 ((uint16_t)offsetof(struct padmux_names, GPIO4_0)) #endif @@ -8380,6 +9103,39 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) #define PMX_GPIO4_7 ((uint16_t)offsetof(struct padmux_names, GPIO4_7)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO5 ((uint16_t)offsetof(struct padmux_names, GPIO5)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO50 ((uint16_t)offsetof(struct padmux_names, GPIO50)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO51 ((uint16_t)offsetof(struct padmux_names, GPIO51)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO52 ((uint16_t)offsetof(struct padmux_names, GPIO52)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO53 ((uint16_t)offsetof(struct padmux_names, GPIO53)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO54 ((uint16_t)offsetof(struct padmux_names, GPIO54)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO55 ((uint16_t)offsetof(struct padmux_names, GPIO55)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO56 ((uint16_t)offsetof(struct padmux_names, GPIO56)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO57 ((uint16_t)offsetof(struct padmux_names, GPIO57)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO58 ((uint16_t)offsetof(struct padmux_names, GPIO58)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO59 ((uint16_t)offsetof(struct padmux_names, GPIO59)) +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_GPIO5_0 ((uint16_t)offsetof(struct padmux_names, GPIO5_0)) #endif @@ -8404,6 +9160,21 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_GPIO5_7 ((uint16_t)offsetof(struct padmux_names, GPIO5_7)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO6 ((uint16_t)offsetof(struct padmux_names, GPIO6)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO60 ((uint16_t)offsetof(struct padmux_names, GPIO60)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO61 ((uint16_t)offsetof(struct padmux_names, GPIO61)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO62 ((uint16_t)offsetof(struct padmux_names, GPIO62)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO63 ((uint16_t)offsetof(struct padmux_names, GPIO63)) +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_GPIO6_0 ((uint16_t)offsetof(struct padmux_names, GPIO6_0)) #endif @@ -8428,6 +9199,9 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_GPIO6_7 ((uint16_t)offsetof(struct padmux_names, GPIO6_7)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO7 ((uint16_t)offsetof(struct padmux_names, GPIO7)) +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_GPIO7_0 ((uint16_t)offsetof(struct padmux_names, GPIO7_0)) #endif @@ -8452,6 +9226,9 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_GPIO7_7 ((uint16_t)offsetof(struct padmux_names, GPIO7_7)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO8 ((uint16_t)offsetof(struct padmux_names, GPIO8)) +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) #define PMX_GPIO8_0 ((uint16_t)offsetof(struct padmux_names, GPIO8_0)) #endif @@ -8476,6 +9253,9 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) #define PMX_GPIO8_7 ((uint16_t)offsetof(struct padmux_names, GPIO8_7)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_GPIO9 ((uint16_t)offsetof(struct padmux_names, GPIO9)) +#endif #if defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_GPIO9_0 ((uint16_t)offsetof(struct padmux_names, GPIO9_0)) #endif @@ -8572,10 +9352,10 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_INGENIC) #define PMX_I2C0_PORTA ((uint16_t)offsetof(struct padmux_names, I2C0_PORTA)) #endif -#if defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_I2C0_SCL ((uint16_t)offsetof(struct padmux_names, I2C0_SCL)) #endif -#if defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_I2C0_SDA ((uint16_t)offsetof(struct padmux_names, I2C0_SDA)) #endif #if defined(IPCHW_PADMUX_SSTAR) @@ -8608,10 +9388,10 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_INGENIC) #define PMX_I2C1_PORTC ((uint16_t)offsetof(struct padmux_names, I2C1_PORTC)) #endif -#if defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_I2C1_SCL ((uint16_t)offsetof(struct padmux_names, I2C1_SCL)) #endif -#if defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_I2C1_SDA ((uint16_t)offsetof(struct padmux_names, I2C1_SDA)) #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -8650,10 +9430,10 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_INGENIC) #define PMX_I2C2_PORTB ((uint16_t)offsetof(struct padmux_names, I2C2_PORTB)) #endif -#if defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_I2C2_SCL ((uint16_t)offsetof(struct padmux_names, I2C2_SCL)) #endif -#if defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_I2C2_SDA ((uint16_t)offsetof(struct padmux_names, I2C2_SDA)) #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -9220,6 +10000,36 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_INGENIC) #define PMX_MAC0_RMII_P1 ((uint16_t)offsetof(struct padmux_names, MAC0_RMII_P1)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_MAC_MDC ((uint16_t)offsetof(struct padmux_names, MAC_MDC)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_MAC_MDIO ((uint16_t)offsetof(struct padmux_names, MAC_MDIO)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_MAC_REF_CLK ((uint16_t)offsetof(struct padmux_names, MAC_REF_CLK)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_MAC_RMII_CLK ((uint16_t)offsetof(struct padmux_names, MAC_RMII_CLK)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_MAC_RXDV ((uint16_t)offsetof(struct padmux_names, MAC_RXDV)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_MAC_RXD_0 ((uint16_t)offsetof(struct padmux_names, MAC_RXD_0)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_MAC_RXD_1 ((uint16_t)offsetof(struct padmux_names, MAC_RXD_1)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_MAC_TXD_0 ((uint16_t)offsetof(struct padmux_names, MAC_TXD_0)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_MAC_TXD_1 ((uint16_t)offsetof(struct padmux_names, MAC_TXD_1)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_MAC_TXEN ((uint16_t)offsetof(struct padmux_names, MAC_TXEN)) +#endif #if defined(IPCHW_PADMUX_INGENIC) #define PMX_MCLK_PORTA ((uint16_t)offsetof(struct padmux_names, MCLK_PORTA)) #endif @@ -10195,6 +11005,21 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_SSTAR) || (defined(IPCHW_VENDOR_SSTAR) && !defined(STANDALONE_LIBRARY)) #define PMX_PAD_USB_DP ((uint16_t)offsetof(struct padmux_names, PAD_USB_DP)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_PAE_JTAG_TCK ((uint16_t)offsetof(struct padmux_names, PAE_JTAG_TCK)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_PAE_JTAG_TDI ((uint16_t)offsetof(struct padmux_names, PAE_JTAG_TDI)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_PAE_JTAG_TDO ((uint16_t)offsetof(struct padmux_names, PAE_JTAG_TDO)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_PAE_JTAG_TMS ((uint16_t)offsetof(struct padmux_names, PAE_JTAG_TMS)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_PAE_JTAG_TRSTN ((uint16_t)offsetof(struct padmux_names, PAE_JTAG_TRSTN)) +#endif #if defined(IPCHW_VENDOR_INGENIC) && !defined(STANDALONE_LIBRARY) #define PMX_PAFLG ((uint16_t)offsetof(struct padmux_names, PAFLG)) #endif @@ -11614,7 +12439,7 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_V4) #define PMX_POR_SEL ((uint16_t)offsetof(struct padmux_names, POR_SEL)) #endif -#if defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) #define PMX_PWM0 ((uint16_t)offsetof(struct padmux_names, PWM0)) #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -11662,10 +12487,10 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_INGENIC) #define PMX_PWM0_PC ((uint16_t)offsetof(struct padmux_names, PWM0_PC)) #endif -#if defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) #define PMX_PWM1 ((uint16_t)offsetof(struct padmux_names, PWM1)) #endif -#if defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V4) #define PMX_PWM10 ((uint16_t)offsetof(struct padmux_names, PWM10)) #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -11695,7 +12520,7 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_SSTAR) #define PMX_PWM10_MODE_4 ((uint16_t)offsetof(struct padmux_names, PWM10_MODE_4)) #endif -#if defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V4) #define PMX_PWM11 ((uint16_t)offsetof(struct padmux_names, PWM11)) #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -11773,7 +12598,7 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_INGENIC) #define PMX_PWM1_PC ((uint16_t)offsetof(struct padmux_names, PWM1_PC)) #endif -#if defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) #define PMX_PWM2 ((uint16_t)offsetof(struct padmux_names, PWM2)) #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -11812,7 +12637,7 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_INGENIC) #define PMX_PWM2_PC ((uint16_t)offsetof(struct padmux_names, PWM2_PC)) #endif -#if defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) #define PMX_PWM3 ((uint16_t)offsetof(struct padmux_names, PWM3)) #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -11851,7 +12676,7 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_INGENIC) #define PMX_PWM3_PC ((uint16_t)offsetof(struct padmux_names, PWM3_PC)) #endif -#if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) #define PMX_PWM4 ((uint16_t)offsetof(struct padmux_names, PWM4)) #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -11890,7 +12715,7 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_INGENIC) #define PMX_PWM4_PC ((uint16_t)offsetof(struct padmux_names, PWM4_PC)) #endif -#if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) #define PMX_PWM5 ((uint16_t)offsetof(struct padmux_names, PWM5)) #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -11929,7 +12754,7 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_INGENIC) #define PMX_PWM5_PC ((uint16_t)offsetof(struct padmux_names, PWM5_PC)) #endif -#if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) #define PMX_PWM6 ((uint16_t)offsetof(struct padmux_names, PWM6)) #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -11968,7 +12793,7 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_INGENIC) #define PMX_PWM6_PD ((uint16_t)offsetof(struct padmux_names, PWM6_PD)) #endif -#if defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) #define PMX_PWM7 ((uint16_t)offsetof(struct padmux_names, PWM7)) #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -12007,7 +12832,7 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_INGENIC) #define PMX_PWM7_PD ((uint16_t)offsetof(struct padmux_names, PWM7_PD)) #endif -#if defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V4) #define PMX_PWM8 ((uint16_t)offsetof(struct padmux_names, PWM8)) #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -12049,7 +12874,7 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_SSTAR) #define PMX_PWM8_MODE_8 ((uint16_t)offsetof(struct padmux_names, PWM8_MODE_8)) #endif -#if defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V4) #define PMX_PWM9 ((uint16_t)offsetof(struct padmux_names, PWM9)) #endif #if defined(IPCHW_PADMUX_NOVATEK) @@ -12511,7 +13336,7 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_V4) #define PMX_RST_N ((uint16_t)offsetof(struct padmux_names, RST_N)) #endif -#if defined(IPCHW_PADMUX_NOVATEK) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_NOVATEK) #define PMX_RTC_CLK ((uint16_t)offsetof(struct padmux_names, RTC_CLK)) #endif #if defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2A) @@ -12547,6 +13372,18 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_INGENIC) #define PMX_SA2 ((uint16_t)offsetof(struct padmux_names, SA2)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SADC_XAIN0 ((uint16_t)offsetof(struct padmux_names, SADC_XAIN0)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SADC_XAIN1 ((uint16_t)offsetof(struct padmux_names, SADC_XAIN1)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SADC_XAIN2 ((uint16_t)offsetof(struct padmux_names, SADC_XAIN2)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SADC_XAIN3 ((uint16_t)offsetof(struct padmux_names, SADC_XAIN3)) +#endif #if defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) #define PMX_SAR_ADC_CH0 ((uint16_t)offsetof(struct padmux_names, SAR_ADC_CH0)) #endif @@ -12637,33 +13474,81 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_INGENIC) #define PMX_SD0 ((uint16_t)offsetof(struct padmux_names, SD0)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SD0_CD ((uint16_t)offsetof(struct padmux_names, SD0_CD)) +#endif #if defined(IPCHW_PADMUX_SSTAR) #define PMX_SD0_CDZ_MODE ((uint16_t)offsetof(struct padmux_names, SD0_CDZ_MODE)) #endif #if defined(IPCHW_PADMUX_SSTAR) #define PMX_SD0_CDZ_MODE_1 ((uint16_t)offsetof(struct padmux_names, SD0_CDZ_MODE_1)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SD0_CLK ((uint16_t)offsetof(struct padmux_names, SD0_CLK)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SD0_CMD_RSP ((uint16_t)offsetof(struct padmux_names, SD0_CMD_RSP)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SD0_DATA_0 ((uint16_t)offsetof(struct padmux_names, SD0_DATA_0)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SD0_DATA_1 ((uint16_t)offsetof(struct padmux_names, SD0_DATA_1)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SD0_DATA_2 ((uint16_t)offsetof(struct padmux_names, SD0_DATA_2)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SD0_DATA_3 ((uint16_t)offsetof(struct padmux_names, SD0_DATA_3)) +#endif #if defined(IPCHW_PADMUX_SSTAR) #define PMX_SD0_MODE ((uint16_t)offsetof(struct padmux_names, SD0_MODE)) #endif #if defined(IPCHW_PADMUX_SSTAR) #define PMX_SD0_MODE_1 ((uint16_t)offsetof(struct padmux_names, SD0_MODE_1)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SD0_WP ((uint16_t)offsetof(struct padmux_names, SD0_WP)) +#endif #if defined(IPCHW_PADMUX_INGENIC) #define PMX_SD1 ((uint16_t)offsetof(struct padmux_names, SD1)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SD1_CD ((uint16_t)offsetof(struct padmux_names, SD1_CD)) +#endif #if defined(IPCHW_PADMUX_SSTAR) #define PMX_SD1_CDZ_MODE_1 ((uint16_t)offsetof(struct padmux_names, SD1_CDZ_MODE_1)) #endif #if defined(IPCHW_PADMUX_SSTAR) #define PMX_SD1_CDZ_MODE_2 ((uint16_t)offsetof(struct padmux_names, SD1_CDZ_MODE_2)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SD1_CLK ((uint16_t)offsetof(struct padmux_names, SD1_CLK)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SD1_CMD_RSP ((uint16_t)offsetof(struct padmux_names, SD1_CMD_RSP)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SD1_DATA_0 ((uint16_t)offsetof(struct padmux_names, SD1_DATA_0)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SD1_DATA_1 ((uint16_t)offsetof(struct padmux_names, SD1_DATA_1)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SD1_DATA_2 ((uint16_t)offsetof(struct padmux_names, SD1_DATA_2)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SD1_DATA_3 ((uint16_t)offsetof(struct padmux_names, SD1_DATA_3)) +#endif #if defined(IPCHW_PADMUX_SSTAR) #define PMX_SD1_MODE_1 ((uint16_t)offsetof(struct padmux_names, SD1_MODE_1)) #endif #if defined(IPCHW_PADMUX_SSTAR) #define PMX_SD1_MODE_2 ((uint16_t)offsetof(struct padmux_names, SD1_MODE_2)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SD1_WP ((uint16_t)offsetof(struct padmux_names, SD1_WP)) +#endif #if defined(IPCHW_PADMUX_INGENIC) #define PMX_SD2 ((uint16_t)offsetof(struct padmux_names, SD2)) #endif @@ -12979,7 +13864,7 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_NOVATEK) #define PMX_SENSOR_CCIR_2 ((uint16_t)offsetof(struct padmux_names, SENSOR_CCIR_2)) #endif -#if defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V4) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V4) #define PMX_SENSOR_CLK ((uint16_t)offsetof(struct padmux_names, SENSOR_CLK)) #endif #if defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) @@ -13729,9 +14614,21 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_INGENIC) #define PMX_SSI0_CE1 ((uint16_t)offsetof(struct padmux_names, SSI0_CE1)) #endif -#if defined(IPCHW_PADMUX_INGENIC) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_INGENIC) #define PMX_SSI0_CLK ((uint16_t)offsetof(struct padmux_names, SSI0_CLK)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SSI0_CSN_0 ((uint16_t)offsetof(struct padmux_names, SSI0_CSN_0)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SSI0_CSN_1 ((uint16_t)offsetof(struct padmux_names, SSI0_CSN_1)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SSI0_D2 ((uint16_t)offsetof(struct padmux_names, SSI0_D2)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SSI0_D3 ((uint16_t)offsetof(struct padmux_names, SSI0_D3)) +#endif #if defined(IPCHW_PADMUX_INGENIC) #define PMX_SSI0_DR ((uint16_t)offsetof(struct padmux_names, SSI0_DR)) #endif @@ -13750,12 +14647,21 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_INGENIC) #define PMX_SSI0_PORTC ((uint16_t)offsetof(struct padmux_names, SSI0_PORTC)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SSI0_RXD ((uint16_t)offsetof(struct padmux_names, SSI0_RXD)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SSI0_TXD ((uint16_t)offsetof(struct padmux_names, SSI0_TXD)) +#endif #if defined(IPCHW_PADMUX_INGENIC) #define PMX_SSI1_CE0 ((uint16_t)offsetof(struct padmux_names, SSI1_CE0)) #endif -#if defined(IPCHW_PADMUX_INGENIC) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_INGENIC) #define PMX_SSI1_CLK ((uint16_t)offsetof(struct padmux_names, SSI1_CLK)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SSI1_CSN_0 ((uint16_t)offsetof(struct padmux_names, SSI1_CSN_0)) +#endif #if defined(IPCHW_PADMUX_INGENIC) #define PMX_SSI1_DR ((uint16_t)offsetof(struct padmux_names, SSI1_DR)) #endif @@ -13765,6 +14671,27 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_INGENIC) #define PMX_SSI1_PORTC ((uint16_t)offsetof(struct padmux_names, SSI1_PORTC)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SSI1_RXD ((uint16_t)offsetof(struct padmux_names, SSI1_RXD)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SSI1_TXD ((uint16_t)offsetof(struct padmux_names, SSI1_TXD)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SSI2_CLK ((uint16_t)offsetof(struct padmux_names, SSI2_CLK)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SSI2_CSN ((uint16_t)offsetof(struct padmux_names, SSI2_CSN)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SSI2_CSN_0 ((uint16_t)offsetof(struct padmux_names, SSI2_CSN_0)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SSI2_RXD ((uint16_t)offsetof(struct padmux_names, SSI2_RXD)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_SSI2_TXD ((uint16_t)offsetof(struct padmux_names, SSI2_TXD)) +#endif #if defined(IPCHW_PADMUX_INGENIC) #define PMX_SSI_SLV_CE0 ((uint16_t)offsetof(struct padmux_names, SSI_SLV_CE0)) #endif @@ -13846,6 +14773,15 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_TEST_CLK ((uint16_t)offsetof(struct padmux_names, TEST_CLK)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_TEST_INT_RMII_TXD_0 ((uint16_t)offsetof(struct padmux_names, TEST_INT_RMII_TXD_0)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_TEST_INT_RMII_TXD_1 ((uint16_t)offsetof(struct padmux_names, TEST_INT_RMII_TXD_1)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_TEST_INT_RMII_TXEN ((uint16_t)offsetof(struct padmux_names, TEST_INT_RMII_TXEN)) +#endif #if defined(IPCHW_PADMUX_SSTAR) #define PMX_TEST_IN_MODE_1 ((uint16_t)offsetof(struct padmux_names, TEST_IN_MODE_1)) #endif @@ -13855,6 +14791,12 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_SSTAR) #define PMX_TEST_IN_MODE_3 ((uint16_t)offsetof(struct padmux_names, TEST_IN_MODE_3)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_TEST_I_INT_SMI_MDC ((uint16_t)offsetof(struct padmux_names, TEST_I_INT_SMI_MDC)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_TEST_I_INT_SMI_MDIO_I ((uint16_t)offsetof(struct padmux_names, TEST_I_INT_SMI_MDIO_I)) +#endif #if defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_TEST_MODE ((uint16_t)offsetof(struct padmux_names, TEST_MODE)) #endif @@ -13867,6 +14809,39 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_SSTAR) #define PMX_TEST_OUT_MODE_3 ((uint16_t)offsetof(struct padmux_names, TEST_OUT_MODE_3)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_TEST_O_INT_RMII_CLK ((uint16_t)offsetof(struct padmux_names, TEST_O_INT_RMII_CLK)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_TEST_O_INT_RMII_CRSDV ((uint16_t)offsetof(struct padmux_names, TEST_O_INT_RMII_CRSDV)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_TEST_O_INT_RMII_RXD_0 ((uint16_t)offsetof(struct padmux_names, TEST_O_INT_RMII_RXD_0)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_TEST_O_INT_RMII_RXD_1 ((uint16_t)offsetof(struct padmux_names, TEST_O_INT_RMII_RXD_1)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_TEST_O_INT_RMII_TXD_0 ((uint16_t)offsetof(struct padmux_names, TEST_O_INT_RMII_TXD_0)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_TEST_O_INT_RMII_TXD_1 ((uint16_t)offsetof(struct padmux_names, TEST_O_INT_RMII_TXD_1)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_TEST_O_INT_RMII_TXEN ((uint16_t)offsetof(struct padmux_names, TEST_O_INT_RMII_TXEN)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_TEST_O_INT_SMI_MDC ((uint16_t)offsetof(struct padmux_names, TEST_O_INT_SMI_MDC)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_TEST_O_INT_SMI_MDIO_I ((uint16_t)offsetof(struct padmux_names, TEST_O_INT_SMI_MDIO_I)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_TEST_O_INT_SMI_MDIO_O ((uint16_t)offsetof(struct padmux_names, TEST_O_INT_SMI_MDIO_O)) +#endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_TEST_O_INT_SMI_MDIO_OE ((uint16_t)offsetof(struct padmux_names, TEST_O_INT_SMI_MDIO_OE)) +#endif #if defined(IPCHW_PADMUX_INGENIC) #define PMX_TFT_LCD_PD ((uint16_t)offsetof(struct padmux_names, TFT_LCD_PD)) #endif @@ -14068,9 +15043,15 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_3536C) #define PMX_UART0_RTSN ((uint16_t)offsetof(struct padmux_names, UART0_RTSN)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_UART0_RX ((uint16_t)offsetof(struct padmux_names, UART0_RX)) +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_UART0_RXD ((uint16_t)offsetof(struct padmux_names, UART0_RXD)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_UART0_TX ((uint16_t)offsetof(struct padmux_names, UART0_TX)) +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_UART0_TXD ((uint16_t)offsetof(struct padmux_names, UART0_TXD)) #endif @@ -14110,9 +15091,15 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_UART1_RTSN ((uint16_t)offsetof(struct padmux_names, UART1_RTSN)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_UART1_RX ((uint16_t)offsetof(struct padmux_names, UART1_RX)) +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_UART1_RXD ((uint16_t)offsetof(struct padmux_names, UART1_RXD)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_UART1_TX ((uint16_t)offsetof(struct padmux_names, UART1_TX)) +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_UART1_TXD ((uint16_t)offsetof(struct padmux_names, UART1_TXD)) #endif @@ -14185,9 +15172,15 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) #define PMX_UART2_RTSN ((uint16_t)offsetof(struct padmux_names, UART2_RTSN)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_UART2_RX ((uint16_t)offsetof(struct padmux_names, UART2_RX)) +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_UART2_RXD ((uint16_t)offsetof(struct padmux_names, UART2_RXD)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_UART2_TX ((uint16_t)offsetof(struct padmux_names, UART2_TX)) +#endif #if defined(IPCHW_PADMUX_3536C) || defined(IPCHW_PADMUX_3536D) || defined(IPCHW_PADMUX_INGENIC) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V3A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_UART2_TXD ((uint16_t)offsetof(struct padmux_names, UART2_TXD)) #endif @@ -14344,10 +15337,13 @@ static inline const char *padmux_name(uint16_t off) { #if defined(IPCHW_PADMUX_V4A) #define PMX_USBPHY_TEST_OBS7 ((uint16_t)offsetof(struct padmux_names, USBPHY_TEST_OBS7)) #endif +#if defined(IPCHW_PADMUX_FH) +#define PMX_USB_DBG_CLK ((uint16_t)offsetof(struct padmux_names, USB_DBG_CLK)) +#endif #if defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_USB_OVRCUR ((uint16_t)offsetof(struct padmux_names, USB_OVRCUR)) #endif -#if defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) +#if defined(IPCHW_PADMUX_FH) || defined(IPCHW_PADMUX_V1) || defined(IPCHW_PADMUX_V2) || defined(IPCHW_PADMUX_V2A) || defined(IPCHW_PADMUX_V3) || defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) #define PMX_USB_PWREN ((uint16_t)offsetof(struct padmux_names, USB_PWREN)) #endif #if defined(IPCHW_PADMUX_V4) || defined(IPCHW_PADMUX_V4A) || defined(IPCHW_PADMUX_V5) diff --git a/src/reginfo.c b/src/reginfo.c index b90aa18c..9c54c9e0 100644 --- a/src/reginfo.c +++ b/src/reginfo.c @@ -3401,7 +3401,7 @@ uint32_t gpio_windows_in_mapping(unsigned long off, unsigned long len, #endif static int gpio_mux_by(const char *gpio_number, int func_num, - const char *set_func); + const char *set_func, bool force); static int padmux_refuse(int code, const char *pad_spec, const char *func); static int sstar_gpio_getset(char **argv, bool set_op); static int sstar_gpio_scan_cmd(void); @@ -3689,7 +3689,7 @@ static int gpio_manipulate(char **argv, bool set_op) { } const char *gpio_num = argv[1]; - gpio_mux_by(gpio_num, -1, NULL); + gpio_mux_by(gpio_num, -1, NULL, false); int group, num; if (sscanf(gpio_num, "%d_%d", &group, &num) != 2) { @@ -3787,6 +3787,12 @@ static int padmux_refuse(int code, const char *pad_spec, const char *func) { fprintf(stderr, "Cannot reach the pad-mux register of GPIO %s\n", pad_spec); break; + case IPCHW_PADMUX_IN_USE: + fprintf(stderr, + "GPIO %s is carrying a line the board runs from (the boot " + "flash); not moving it. Add --force if you are sure\n", + pad_spec); + break; default: fprintf(stderr, "Pad-mux error %d on GPIO %s\n", code, pad_spec); break; @@ -3804,7 +3810,7 @@ static int padmux_refuse(int code, const char *pad_spec, const char *func) { * resolved to the name of the function it selects, which is the only spelling * the two other vendors have. */ static int gpio_mux_by(const char *gpio_number, int func_num, - const char *set_func) { + const char *set_func, bool force) { /* Detection first: how a pad may be spelled is the SoC's to say. */ getchipname(); @@ -3886,7 +3892,8 @@ static int gpio_mux_by(const char *gpio_number, int func_num, return EXIT_SUCCESS; } - int res = ipchw_padmux_set(pad, want); + int res = force ? ipchw_padmux_set_forced(pad, want) + : ipchw_padmux_set(pad, want); if (res != 0) return padmux_refuse(res, gpio_number, want); @@ -3894,26 +3901,29 @@ static int gpio_mux_by(const char *gpio_number, int func_num, } static int gpio_mux_cmd(int argc, char **argv) { - if (argc < 2 || argc > 3) { + /* --force last, and only after a function: asking cannot be forced. */ + bool force = argc == 4 && !strcmp(argv[3], "--force"); + if (argc < 2 || argc > 4 || (argc == 4 && !force)) { printf( - "Usage: ipctool gpio %s %s\n%s%s", "mux", - " [function name or number]", + "Usage: ipctool gpio %s %s\n%s%s%s", "mux", + " [function name or number [--force]]", "where: is 46, 5_6 on HiSilicon, or the pad's name " "(P_GPIO22 on Novatek)\n", " with no function, reports what the pad carries;\n" - " pass GPIO to mux it back to plain GPIO\n"); + " pass GPIO to mux it back to plain GPIO\n", + " --force moves a pad off a line the board runs from\n"); return EXIT_FAILURE; } const char *set_func = NULL; int func_num = -1; - if (argc == 3) { + if (argc >= 3) { set_func = argv[2]; if (isdigit(set_func[0])) func_num = strtoul(set_func, NULL, 10); } - return gpio_mux_by(argv[1], func_num, set_func); + return gpio_mux_by(argv[1], func_num, set_func, force); } /* Which pads are muxed to plain GPIO right now, a bitmask per bank of eight. @@ -4084,7 +4094,7 @@ static bool sstar_gpio_streamer_mapped(void) { static int sstar_gpio_getset(char **argv, bool set_op) { const char *gpio_num = argv[1]; - gpio_mux_by(gpio_num, -1, NULL); + gpio_mux_by(gpio_num, -1, NULL, false); char *tail; long pad = strtol(gpio_num, &tail, 10); @@ -4248,7 +4258,7 @@ static int sstar_gpio_scan_cmd(void) { static int novatek_gpio_getset(char **argv, bool set_op) { const char *gpio_num = argv[1]; - gpio_mux_by(gpio_num, -1, NULL); + gpio_mux_by(gpio_num, -1, NULL, false); int pad = padmux_parse_pad(gpio_num); if (!novatek_gpio_valid(pad)) { diff --git a/src/reginfo_test.c b/src/reginfo_test.c index 91cb9586..2cb84d69 100644 --- a/src/reginfo_test.c +++ b/src/reginfo_test.c @@ -16,6 +16,7 @@ #include "hal/novatek_gpio.h" #include "hal/sstar.h" #include "hal/sstar_gpio.h" +#include "hal/fh.h" #include "hal/xm.h" #include "ipchw.h" #include "padmux.h" @@ -1196,7 +1197,7 @@ static void test_round_trip(const char *chip, const ipchw_padmux_t *rows, continue; regs_reset(); - int res = ipchw_padmux_set(want->gpio_pad, want->func_name); + int res = ipchw_padmux_set_forced(want->gpio_pad, want->func_name); if (res != 0) { fprintf(stderr, " FAIL %s: set(%d, %s) = %d\n", chip, want->gpio_pad, want->func_name, res); @@ -1216,7 +1217,7 @@ static void test_round_trip(const char *chip, const ipchw_padmux_t *rows, if (want->gpio_name != NULL) { regs_reset(); - if (ipchw_padmux_set(want->gpio_pad, IPCHW_PADMUX_GPIO) != 0 || + if (ipchw_padmux_set_forced(want->gpio_pad, IPCHW_PADMUX_GPIO) != 0 || ipchw_padmux_get(want->gpio_pad, &got) != 1 || !(got.flags & IPCHW_PADMUX_F_GPIO)) { fprintf(stderr, " FAIL %s: pad %d will not go back to GPIO\n", @@ -1380,6 +1381,10 @@ static void test_table_integrity(void) { #ifdef IPCHW_PADMUX_XM {CHIP_XM510, "XM510"}, {CHIP_XM530, "XM550"}, +#endif +#ifdef IPCHW_PADMUX_FH + {CHIP_FH8852V200, "FH8852V200"}, + {CHIP_FH8852V100, "FH8852V100"}, #endif }; @@ -1492,6 +1497,82 @@ static void test_gpio_windows_in_mapping(void) { CHECK(gpio_windows_in_mapping(0x1250, 0x20, base, stride, 3) == 0x4); } +#ifdef IPCHW_PADMUX_FH +static void test_fh(void) { + ipchw_padmux_t r; + + /* A Tenda IC7-L (FH8852V200 + GC4653): the IR-cut filter is on GPIO9 and + * GPIO10, pads 46 and 47, which come up as SSI0_D2/D3 and needed + * "mux,GPIO9,GPIO9,0" in /proc/driver/pinctrl before the filter moved. + * After it the kernel's dump read "GPIO9 sel=0001 ie=0000 oe=0001". */ + puts("Fullhan FH8852V200: a selector in the pad's own register"); + as_chip(CHIP_FH8852V200, "FH8852V200"); + CHECK(padmux_parse_pad("9") == 9); + CHECK(padmux_parse_pad("GPIO9") == 9); + CHECK(padmux_parse_pad("1_1") == -1); /* HiSilicon's banking */ + CHECK(padmux_parse_pad("64") == -1); /* GPIO0..63 are all there is */ + CHECK(ipchw_padmux_get(64, &r) == IPCHW_PADMUX_NO_PAD); + /* 46 is GPIO9's pad id, and a GPIO number in its own right: GPIO46 is a + * different pad, so it must not resolve to pad 46's register. */ + CHECK(ipchw_padmux_by_pad(46, &r, 1) >= 1 && r.address != 0xF0000138); + + CHECK(ipchw_padmux_by_pad(9, NULL, 0) == 5); + CHECK(ipchw_padmux_by_func("SSI0_D2", &r, 1) == 1); + CHECK(r.address == 0xF0000138 && r.gpio_pad == 9 && + !strcmp(r.gpio_name, "GPIO9")); + CHECK(r.func_mask == 0x1F001100 && r.func == 0x10001100); + CHECK(r.gpio_func == 0x11001100); + + regs_reset(); + fake_write(0xF0000138, 0x00000021, 32); /* SSI0_D2, ds 2 */ + CHECK(ipchw_padmux_get(9, &r) == 1 && !strcmp(r.func_name, "SSI0_D2")); + CHECK(!(r.flags & IPCHW_PADMUX_F_GPIO)); + + /* A flash function is not moved off without being told to: the hardware + * cannot say whether the flash is using it. */ + CHECK(ipchw_padmux_set(9, IPCHW_PADMUX_GPIO) == IPCHW_PADMUX_IN_USE); + CHECK(reg_of(0xF0000138) == 0x00000021); + + /* What the kernel's mux writes: the selector, and the input, output and + * Schmitt enables. The drive strength in bits 4..6 is left alone. */ + CHECK(ipchw_padmux_set_forced(9, IPCHW_PADMUX_GPIO) == 0); + CHECK(reg_of(0xF0000138) == 0x11001121); + CHECK(ipchw_padmux_get(9, &r) == 1 && (r.flags & IPCHW_PADMUX_F_GPIO)); + CHECK(!strcmp(r.func_name, "GPIO9")); + CHECK(ipchw_padmux_set(9, "UART1_TX") == 0); + CHECK(reg_of(0xF0000138) == 0x12001121); + CHECK(ipchw_padmux_set(9, "SSI0_D3") == IPCHW_PADMUX_NO_FUNC); + CHECK(ipchw_padmux_set(10, "SSI0_D3") == 0); + CHECK(reg_of(0xF000013C) == 0x10001100); + + /* A selector the table has no function for. */ + fake_write(0xF0000138, 0x0F000000, 32); + CHECK(ipchw_padmux_get(9, &r) == 0); + + /* SSI0_TXD on GPIO7, as a Tenda IC7-L reads it. Moving it off is + * refused and writes nothing; writing what it carries is not moving it; + * the forced call does what it is told. */ + fake_write(0xF0000130, 0x10001120, 32); + CHECK(ipchw_padmux_set(7, IPCHW_PADMUX_GPIO) == IPCHW_PADMUX_IN_USE); + CHECK(reg_of(0xF0000130) == 0x10001120); + CHECK(ipchw_padmux_set(7, "SSI0_TXD") == 0); + CHECK(ipchw_padmux_set_forced(7, IPCHW_PADMUX_GPIO) == 0); + CHECK(reg_of(0xF0000130) == 0x11001120); + /* A pad of something else with its enables set is anyone's to move. */ + CHECK(ipchw_padmux_set(9, "UART1_TX") == 0); + CHECK(ipchw_padmux_set(9, IPCHW_PADMUX_GPIO) == 0); + + /* The V100 parts number the same GPIO on a different pad. */ + puts("Fullhan FH8852V100: the same layout, its own table"); + as_chip(CHIP_FH8852V100, "FH8852V100"); + CHECK(ipchw_padmux_by_pad(9, &r, 1) >= 1 && r.address == 0xF0000130); + + /* Recognised, but the vendor ships no table for it. */ + as_chip(CHIP_FH8856V201, "FH8856V201"); + CHECK(ipchw_padmux_get(9, &r) == IPCHW_PADMUX_NO_TABLE); +} +#endif + #ifdef IPCHW_PADMUX_XM /* Xiongmai: a bit per alternative in the pad's (XM530) or the port's (XM510) * register. The values seeded below are the lab boards' registers at rest, @@ -1614,6 +1695,9 @@ int main(void) { #endif #ifdef IPCHW_PADMUX_XM test_xm(); +#endif +#ifdef IPCHW_PADMUX_FH + test_fh(); #endif test_refusals_do_not_exit(); test_table_integrity(); diff --git a/tools/gen_fh_padmux.py b/tools/gen_fh_padmux.py new file mode 100644 index 00000000..b541911c --- /dev/null +++ b/tools/gen_fh_padmux.py @@ -0,0 +1,194 @@ +#!/usr/bin/env python3 +"""Turn Fullhan vendor kernels' pad tables into src/hal/fh_padmux.h. + +Fullhan muxes per pad, the HiSilicon way: every pad has one register in the +PMU block, at 0xF0000080 + 4 * pad, and bits 24..27 of it (`mfs` in the +vendor's PinCtrl_Register) select which of the pad's functions it carries. +The vendor kernel lists those functions in its iopad.h as + + PINCTRL_FUNC(SSI0_D2, 46, FUNC0, PUPD_NONE, 4); + PINCTRL_FUNC(GPIO9, 46, FUNC1, PUPD_NONE, 2); + +-- name, pad, selector, pull, drive -- and that is all this script reads. The +pull and drive columns are the vendor's defaults for a function, not part of +selecting it, and are dropped. + +Usage: + gen_fh_padmux.py --table V200=[,...] \\ + --table V100=[,...] > src/hal/fh_padmux.h + gen_fh_padmux.py ... --verify src/hal/fh_padmux.h + +Several files under one tag must parse to the SAME rows -- the script proves +that the chips sharing a table really do, rather than assuming it from their +names -- and the tag becomes the table's name in C. src/hal/fh_padmux.c maps +chips to tags. + +The script refuses rather than guesses: a pad given the same selector twice, +a selector that does not fit the four-bit field, a pad with two GPIO +functions, a GPIO number claimed by two pads, or files under one tag that +disagree all exit non-zero. +""" + +import argparse +import hashlib +import os +import re +import sys + +PAD_BASE = 0xF0000080 +SEL_BITS = 4 + +ROW = re.compile( + r"^\s*PINCTRL_FUNC\(\s*(\w+)\s*,\s*(\d+)\s*,\s*FUNC(\d+)\s*,", re.M) +GPIO = re.compile(r"GPIO(\d+)") + + +class Refusal(Exception): + pass + + +def strip_comments(text): + text = re.sub(r"/\*.*?\*/", " ", text, flags=re.S) + return re.sub(r"//[^\n]*", " ", text) + + +def pmx(name): + """The PMX_ identifier for a name; tools/gen_padmux_names.py mangles the + same way, and a disagreement is a compile error rather than a wrong + name.""" + ident = re.sub(r"[^A-Za-z0-9_]", "__", name) + if not ident or ident[0].isdigit(): + ident = "_" + ident + return "PMX_" + ident + + +def parse(path): + """Rows (pad, sel, name), sorted by pad then selector, after checking + everything the backend relies on.""" + with open(path, encoding="utf-8", errors="replace") as handle: + text = strip_comments(handle.read()) + if re.search(r"^\s*#\s*if", text, re.M): + # Conditional rows would make the table depend on a kernel config this + # script cannot see. + raise Refusal("%s: has #if blocks" % path) + + rows = [] + seen = {} + gpio_of_pad = {} + pad_of_gpio = {} + for name, pad, sel in ROW.findall(text): + pad, sel = int(pad), int(sel) + if sel >= 1 << SEL_BITS: + raise Refusal("%s: %s on pad %d has selector %d, wider than the " + "field" % (path, name, pad, sel)) + if (pad, sel) in seen: + raise Refusal("%s: pad %d selector %d is both %s and %s" + % (path, pad, sel, seen[(pad, sel)], name)) + seen[(pad, sel)] = name + m = GPIO.fullmatch(name) + if m: + gpio = int(m.group(1)) + if pad in gpio_of_pad: + raise Refusal("%s: pad %d is both GPIO%d and GPIO%d" + % (path, pad, gpio_of_pad[pad], gpio)) + if gpio in pad_of_gpio: + raise Refusal("%s: GPIO%d is on pads %d and %d" + % (path, gpio, pad_of_gpio[gpio], pad)) + gpio_of_pad[pad] = gpio + pad_of_gpio[gpio] = pad + rows.append((pad, sel, name)) + if not rows: + raise Refusal("%s: no PINCTRL_FUNC rows" % path) + rows.sort() + return rows, gpio_of_pad + + +def digest(path): + with open(path, "rb") as handle: + return hashlib.sha256(handle.read()).hexdigest()[:16] + + +def emit(tables, sources): + out = [] + w = out.append + w("/* Generated by tools/gen_fh_padmux.py -- do not edit.") + w(" *") + w(" * Fullhan pad functions, one row per (pad, selector), from the vendor") + w(" * kernel's iopad.h. A pad's register is 0x%08X + 4 * pad and the" + % PAD_BASE) + w(" * selector is its bits 24..27; see src/hal/fh_padmux.c.") + w(" *") + w(" * Regenerate with:") + args = " \\\n * ".join( + "--table %s=%s" % (tag, ",".join(paths)) + for tag, paths in sources) + w(" * tools/gen_fh_padmux.py \\") + w(" * %s" % args) + w(" *") + w(" * From OpenIPC/linux, as @/:") + for tag, paths in sources: + for p in paths: + w(" * %s %s" % (digest(p), p)) + w(" */") + w("") + w("#ifndef HAL_FH_PADMUX_H") + w("#define HAL_FH_PADMUX_H") + w("") + w('#include "hal/fh_padmux_types.h"') + for tag, (rows, gpio_of_pad) in tables: + pads = len({p for p, _, _ in rows}) + w("") + w("/* %s: %d pads, %d functions, %d of the pads a GPIO. */" + % (tag, pads, len(rows), len(gpio_of_pad))) + w("static const fh_func_t FH_%s_funcs[] = {" % tag) + for pad, sel, name in rows: + w(" {%d, %d, %d, %s}," % (pad, sel, gpio_of_pad.get(pad, -1), + pmx(name))) + w("};") + w("") + w("#endif /* HAL_FH_PADMUX_H */") + return "\n".join(out) + "\n" + + +def main(): + ap = argparse.ArgumentParser( + description=__doc__, + formatter_class=argparse.RawDescriptionHelpFormatter) + ap.add_argument("--table", action="append", required=True, + metavar="TAG=FILE[,FILE...]") + ap.add_argument("--verify", metavar="HEADER", + help="exit 1 if HEADER is not what this would write") + opts = ap.parse_args() + + tables, sources = [], [] + try: + for spec in opts.table: + tag, _, files = spec.partition("=") + if not re.fullmatch(r"[A-Z0-9_]+", tag) or not files: + raise Refusal("--table %r: want TAG=FILE[,FILE...]" % spec) + paths = files.split(",") + first = parse(paths[0]) + for p in paths[1:]: + if parse(p)[0] != first[0]: + raise Refusal("%s and %s disagree; give them separate " + "tags" % (paths[0], p)) + tables.append((tag, first)) + sources.append((tag, paths)) + except (Refusal, OSError) as err: + print("gen_fh_padmux: %s" % err, file=sys.stderr) + return 2 + + text = emit(tables, sources) + if opts.verify: + with open(opts.verify, encoding="utf-8") as handle: + if handle.read() != text: + print("gen_fh_padmux: %s is stale" % opts.verify, + file=sys.stderr) + return 1 + return 0 + sys.stdout.write(text) + return 0 + + +if __name__ == "__main__": + sys.exit(main()) diff --git a/tools/gen_padmux_names.py b/tools/gen_padmux_names.py index 0ec1327b..fbdba320 100644 --- a/tools/gen_padmux_names.py +++ b/tools/gen_padmux_names.py @@ -76,6 +76,7 @@ ("src/hal/ingenic_padmux.h", "defined(IPCHW_PADMUX_INGENIC)", "table"), ("src/hal/sstar_padmux.h", "defined(IPCHW_PADMUX_SSTAR)", "table"), ("src/hal/novatek_padmux.h", "defined(IPCHW_PADMUX_NOVATEK)", "table"), + ("src/hal/fh_padmux.h", "defined(IPCHW_PADMUX_FH)", "table"), ( "src/hal/novatek_reginfo.h", "defined(IPCHW_VENDOR_NOVATEK) && !defined(STANDALONE_LIBRARY)", From c0ab9ff6211b32058fe8523f772d5afae6024349 Mon Sep 17 00:00:00 2001 From: AI Dev Date: Tue, 27 Oct 2026 12:59:07 +0000 Subject: [PATCH 2/2] fh: review round -- bound the pad number, number functions by selector, report a failed read as one - fh_parse_pad() bounds the number before narrowing it. On a 64-bit host "4294967297" became GPIO1 through an int and passed the lookup. GPIO numbers on these parts fit a byte, and strtol() overflow is refused. - `gpio mux ` never matched on Fullhan. The CLI compared n with `func`, which here is the whole value a write puts in the register (selector in bits 24..27 plus the enables), so "9 1" answered "has no function 1". A new optional backend hook, func_number(), gives the number a person types: on Fullhan the selector, as /proc/driver/pinctrl prints it in `sel`. The CLI matches through padmux_func_number(); every other backend still compares `func`, so nothing changes there. - ipchw_padmux_set() reads the pad before applying the flash check and returns any read error as it is. A register that could not be read used to come back as IPCHW_PADMUX_IN_USE, with advice to --force. - reginfo_test: the oversized number, selector numbering on GPIO9, and a failed read under IO_FAILS. --- src/hal/fh_padmux.c | 21 ++++++++++++++++----- src/padmux.c | 18 +++++++++++++++--- src/padmux.h | 9 +++++++++ src/reginfo.c | 2 +- src/reginfo_test.c | 18 ++++++++++++++++++ 5 files changed, 59 insertions(+), 9 deletions(-) diff --git a/src/hal/fh_padmux.c b/src/hal/fh_padmux.c index fc972513..27bef2b7 100644 --- a/src/hal/fh_padmux.c +++ b/src/hal/fh_padmux.c @@ -39,6 +39,7 @@ * as an owner who has named that pad for something else. That Tenda's * GPIO9/GPIO10 are SSI0_D2/D3 unused by its flash, and its IR-cut coils. */ +#include #include #include #include @@ -213,12 +214,11 @@ static int fh_set(int pad, const char *func_name, const padmux_io_t *io) { return 0; } +/* Asked only after the front door has read the pad successfully, so a read + * that fails is reported as the I/O error it is, never as a flash line. */ static bool fh_in_use(int pad, const padmux_io_t *io) { ipchw_padmux_t now; - const int res = fh_get(pad, &now, io); - if (res == IPCHW_PADMUX_IO) - return true; /* cannot tell: not known to be free */ - return res == 1 && !strncmp(now.func_name, "SSI0_", 5); + return fh_get(pad, &now, io) == 1 && !strncmp(now.func_name, "SSI0_", 5); } /* "GPIO9" or "9", both the GPIO number and never the pad id. HiSilicon's @@ -227,12 +227,22 @@ static bool fh_in_use(int pad, const padmux_io_t *io) { static int fh_parse_pad(const char *spec) { const char *s = strncmp(spec, "GPIO", 4) == 0 ? spec + 4 : spec; char *tail; + errno = 0; long v = strtol(s, &tail, 10); - if (tail == s || *tail != '\0' || v < 0) + /* Bounded before it is narrowed: "4294967297" is GPIO1 once it has been + * through an int on a 64-bit host. A GPIO number is a byte here. */ + if (tail == s || *tail != '\0' || errno || v < 0 || v > INT8_MAX) return -1; return find_pad(table(), (int)v) >= 0 ? (int)v : -1; } +/* The number a person types for a function: the selector, as + * /proc/driver/pinctrl prints it in its `sel` column -- not `func`, which is + * the whole value a write puts in the register, enables included. */ +static int fh_func_number(const ipchw_padmux_t *r) { + return (int)(((uint32_t)r->func & FH_SEL_MASK) >> FH_SEL_SHIFT); +} + const padmux_ops_t PADMUX_OPS_FH = { .name = "fh", .walk = fh_walk, @@ -240,4 +250,5 @@ const padmux_ops_t PADMUX_OPS_FH = { .set = fh_set, .parse_pad = fh_parse_pad, .in_use = fh_in_use, + .func_number = fh_func_number, }; diff --git a/src/padmux.c b/src/padmux.c index 08b0639f..4b57f374 100644 --- a/src/padmux.c +++ b/src/padmux.c @@ -194,10 +194,16 @@ static int padmux_set(int pad, const char *func_name, bool force) { if (res < 0) return res; - /* Writing what the pad already carries is not moving it off anything. */ - if (!force && ops->in_use != NULL && ops->in_use(pad, IO)) { + /* Read first: a pad that cannot be read is an I/O error, and calling it + * a flash line would send someone to --force for no reason. Writing what + * the pad already carries is not moving it off anything. */ + if (!force && ops->in_use != NULL) { ipchw_padmux_t now; - if (ops->get(pad, &now, IO) != 1 || strcmp(now.func_name, func_name)) + const int got = ops->get(pad, &now, IO); + if (got < 0) + return got; + if (got == 1 && strcmp(now.func_name, func_name) != 0 && + ops->in_use(pad, IO)) return IPCHW_PADMUX_IN_USE; } @@ -212,6 +218,12 @@ int ipchw_padmux_set_forced(int pad, const char *func_name) { return padmux_set(pad, func_name, true); } +int padmux_func_number(const ipchw_padmux_t *row) { + const padmux_ops_t *ops = chip_generation ? padmux_ops() : NULL; + return ops != NULL && ops->func_number != NULL ? ops->func_number(row) + : row->func; +} + bool padmux_pad_is_gpio(int pad) { ipchw_padmux_t row; diff --git a/src/padmux.h b/src/padmux.h index 3db482d2..c6fb7c07 100644 --- a/src/padmux.h +++ b/src/padmux.h @@ -82,6 +82,11 @@ typedef struct { * be moved off it -- read from the hardware, not assumed. NULL where the * backend cannot tell, which is every one but Fullhan's. */ bool (*in_use)(int pad, const padmux_io_t *io); + + /* The number `gpio mux ` means by a row, where that is not the + * row's `func`: Fullhan's `func` is the whole value a write puts in the + * register, and a person types the selector. NULL means `func`. */ + int (*func_number)(const ipchw_padmux_t *row); } padmux_ops_t; /* Always present: reginfo.c is compiled into every configuration, and its @@ -118,4 +123,8 @@ bool padmux_pad_is_gpio(int pad); * because the bank-of-eight numbering is HiSilicon's. -1 for anything else. */ int padmux_parse_pad(const char *spec); +/* The number the command line accepts for this row's function, on the + * detected SoC: the backend's func_number(), or the row's `func`. */ +int padmux_func_number(const ipchw_padmux_t *row); + #endif /* PADMUX_H */ diff --git a/src/reginfo.c b/src/reginfo.c index 9c54c9e0..55ef8d5d 100644 --- a/src/reginfo.c +++ b/src/reginfo.c @@ -3844,7 +3844,7 @@ static int gpio_mux_by(const char *gpio_number, int func_num, * ipchw_padmux_set() knows how to write it. */ want = NULL; for (int i = 0; i < n; i++) { - if (rows[i].func != func_num) + if (padmux_func_number(&rows[i]) != func_num) continue; if (want != NULL && strcmp(want, rows[i].func_name) != 0) { fprintf(stderr, diff --git a/src/reginfo_test.c b/src/reginfo_test.c index 2cb84d69..030a383e 100644 --- a/src/reginfo_test.c +++ b/src/reginfo_test.c @@ -1511,6 +1511,9 @@ static void test_fh(void) { CHECK(padmux_parse_pad("GPIO9") == 9); CHECK(padmux_parse_pad("1_1") == -1); /* HiSilicon's banking */ CHECK(padmux_parse_pad("64") == -1); /* GPIO0..63 are all there is */ + /* Bounded before it is narrowed: 2^32 + 1 is GPIO1 through an int. */ + CHECK(padmux_parse_pad("4294967297") == -1); + CHECK(padmux_parse_pad("GPIO4294967297") == -1); CHECK(ipchw_padmux_get(64, &r) == IPCHW_PADMUX_NO_PAD); /* 46 is GPIO9's pad id, and a GPIO number in its own right: GPIO46 is a * different pad, so it must not resolve to pad 46's register. */ @@ -1522,6 +1525,17 @@ static void test_fh(void) { !strcmp(r.gpio_name, "GPIO9")); CHECK(r.func_mask == 0x1F001100 && r.func == 0x10001100); CHECK(r.gpio_func == 0x11001100); + /* `gpio mux 9 0` / `9 1`: the number is the selector, not `func`. */ + CHECK(padmux_func_number(&r) == 0); + { + ipchw_padmux_t rows[8]; + int n = ipchw_padmux_by_pad(9, rows, 8); + int found = -1; + for (int i = 0; i < n && i < 8; i++) + if (padmux_func_number(&rows[i]) == 1) + found = i; + CHECK(found >= 0 && !strcmp(rows[found].func_name, "GPIO9")); + } regs_reset(); fake_write(0xF0000138, 0x00000021, 32); /* SSI0_D2, ds 2 */ @@ -1532,6 +1546,10 @@ static void test_fh(void) { * cannot say whether the flash is using it. */ CHECK(ipchw_padmux_set(9, IPCHW_PADMUX_GPIO) == IPCHW_PADMUX_IN_USE); CHECK(reg_of(0xF0000138) == 0x00000021); + /* A register that cannot be read is an I/O error, not a flash line. */ + IO_FAILS = true; + CHECK(ipchw_padmux_set(9, IPCHW_PADMUX_GPIO) == IPCHW_PADMUX_IO); + IO_FAILS = false; /* What the kernel's mux writes: the selector, and the input, output and * Schmitt enables. The drive strength in bits 4..6 is left alone. */