diff --git a/flow/designs/gt2n/aes/constraint.sdc b/flow/designs/gt2n/aes/constraint.sdc
index 4616bf813d..f16cb8a31e 100644
--- a/flow/designs/gt2n/aes/constraint.sdc
+++ b/flow/designs/gt2n/aes/constraint.sdc
@@ -2,9 +2,7 @@ current_design aes_cipher_top
 
 set clk_name clk
 set clk_port_name clk
-# GT2N lib uses time_unit = 1 ps. 500 ps -> 2 GHz target; first-pass
-# loose, can tighten once routing is clean.
-set clk_period 500
+set clk_period 350
 set clk_io_pct 0.2
 
 set clk_port [get_ports $clk_port_name]
diff --git a/flow/designs/gt2n/gcd/constraint.sdc b/flow/designs/gt2n/gcd/constraint.sdc
index 0d4ad131ec..b6f6a14364 100644
--- a/flow/designs/gt2n/gcd/constraint.sdc
+++ b/flow/designs/gt2n/gcd/constraint.sdc
@@ -2,9 +2,7 @@ current_design gcd
 
 set clk_name core_clock
 set clk_port_name clk
-# 500 ps clock (2 GHz) — modest target; lib path delays grow once realistic
-# wire RC kicks in. Tighten once a clean run lands.
-set clk_period 500
+set clk_period 170
 set clk_io_pct 0.2
 
 set clk_port [get_ports $clk_port_name]
diff --git a/flow/designs/gt2n/jpeg/constraint.sdc b/flow/designs/gt2n/jpeg/constraint.sdc
index 83d18b681e..c25f529dda 100644
--- a/flow/designs/gt2n/jpeg/constraint.sdc
+++ b/flow/designs/gt2n/jpeg/constraint.sdc
@@ -2,10 +2,7 @@ current_design jpeg_encoder
 
 set clk_name clk
 set clk_port_name clk
-# GT2N lib uses time_unit = 1 ps. 1500 ps -> 667 MHz. Loose first-pass
-# target with the analytical-RC stand-in -- tighten once the optimize-ppa
-# loop has the baseline period_min.
-set clk_period 1000
+set clk_period 400
 set clk_io_pct 0.2
 
 set clk_port [get_ports $clk_port_name]