From 31af6e54f3e68cba09a569dc9d2d147df67c0112 Mon Sep 17 00:00:00 2001 From: Unconditional One Date: Mon, 12 Oct 2026 01:05:20 +0300 Subject: [PATCH 1/2] Add ESP32-S3 Super Mini board support (#1) --- .../boards/esp32s3_supermini/board.c | 9 ++ .../boards/esp32s3_supermini/mpconfigboard.h | 37 ++++++++ .../boards/esp32s3_supermini/mpconfigboard.mk | 17 ++++ .../espressif/boards/esp32s3_supermini/pins.c | 84 +++++++++++++++++++ .../boards/esp32s3_supermini/sdkconfig | 9 ++ 5 files changed, 156 insertions(+) create mode 100644 ports/espressif/boards/esp32s3_supermini/board.c create mode 100644 ports/espressif/boards/esp32s3_supermini/mpconfigboard.h create mode 100644 ports/espressif/boards/esp32s3_supermini/mpconfigboard.mk create mode 100644 ports/espressif/boards/esp32s3_supermini/pins.c create mode 100644 ports/espressif/boards/esp32s3_supermini/sdkconfig diff --git a/ports/espressif/boards/esp32s3_supermini/board.c b/ports/espressif/boards/esp32s3_supermini/board.c new file mode 100644 index 00000000000..91e0a6df83c --- /dev/null +++ b/ports/espressif/boards/esp32s3_supermini/board.c @@ -0,0 +1,9 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2024 Yaraslau Kurmyza +// +// SPDX-License-Identifier: MIT + +#include "supervisor/board.h" + +// Use the MP_WEAK supervisor/shared/board.c versions of routines not defined here. diff --git a/ports/espressif/boards/esp32s3_supermini/mpconfigboard.h b/ports/espressif/boards/esp32s3_supermini/mpconfigboard.h new file mode 100644 index 00000000000..8ca1b28ffd9 --- /dev/null +++ b/ports/espressif/boards/esp32s3_supermini/mpconfigboard.h @@ -0,0 +1,37 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2024 Yaraslau Kurmyza +// +// SPDX-License-Identifier: MIT + +#pragma once + +// Micropython setup + +#define MICROPY_HW_BOARD_NAME "ESP32-S3 Super Mini" +#define MICROPY_HW_MCU_NAME "ESP32S3" + +// WS2812 RGB LED on GPIO48 (shared with Red power LED - hardware coexists: +// NeoPixel ignores static DC, Red LED tolerates pulses. Exposed as board.RED_LED +// and board.NEOPIXEL; cannot use both simultaneously in CircuitPython due to +// single-pin driver limitation) +#define MICROPY_HW_NEOPIXEL (&pin_GPIO48) + +// Default I2C pins (using safe GPIO pins) +#define DEFAULT_I2C_BUS_SCL (&pin_GPIO6) +#define DEFAULT_I2C_BUS_SDA (&pin_GPIO7) + +// Default SPI pins (using FSPI on safe GPIOs) +#define DEFAULT_SPI_BUS_SCK (&pin_GPIO36) +#define DEFAULT_SPI_BUS_MOSI (&pin_GPIO35) +#define DEFAULT_SPI_BUS_MISO (&pin_GPIO37) + +// Default UART (UART0 on GPIO43/44) +#define DEFAULT_UART_BUS_RX (&pin_GPIO44) +#define DEFAULT_UART_BUS_TX (&pin_GPIO43) + +// Double-tap on BOOT button (GPIO0) +#define DOUBLE_TAP_PIN (&pin_GPIO0) + +// Reduce WiFi TX power due to small PCB antenna +#define CIRCUITPY_WIFI_DEFAULT_TX_POWER (15) diff --git a/ports/espressif/boards/esp32s3_supermini/mpconfigboard.mk b/ports/espressif/boards/esp32s3_supermini/mpconfigboard.mk new file mode 100644 index 00000000000..63a2e149eb2 --- /dev/null +++ b/ports/espressif/boards/esp32s3_supermini/mpconfigboard.mk @@ -0,0 +1,17 @@ +USB_VID = 0x303A +USB_PID = 0x1001 +USB_PRODUCT = "ESP32-S3 Super Mini" +USB_MANUFACTURER = "Generic" + +IDF_TARGET = esp32s3 + +CIRCUITPY_ESP_FLASH_SIZE = 4MB +CIRCUITPY_ESP_FLASH_MODE = qio +CIRCUITPY_ESP_FLASH_FREQ = 80m + +CIRCUITPY_ESP_PSRAM_SIZE = 2MB +CIRCUITPY_ESP_PSRAM_MODE = qio +CIRCUITPY_ESP_PSRAM_FREQ = 80m + +# Include NeoPixel library in firmware for onboard RGB LED +FROZEN_MPY_DIRS += $(TOP)/frozen/Adafruit_CircuitPython_NeoPixel diff --git a/ports/espressif/boards/esp32s3_supermini/pins.c b/ports/espressif/boards/esp32s3_supermini/pins.c new file mode 100644 index 00000000000..ef5b0236ed6 --- /dev/null +++ b/ports/espressif/boards/esp32s3_supermini/pins.c @@ -0,0 +1,84 @@ +// This file is part of the CircuitPython project: https://circuitpython.org +// +// SPDX-FileCopyrightText: Copyright (c) 2024 Yaraslau Kurmyza +// +// SPDX-License-Identifier: MIT + +#include "shared-bindings/board/__init__.h" + +static const mp_rom_map_elem_t board_module_globals_table[] = { + CIRCUITPYTHON_BOARD_DICT_STANDARD_ITEMS + + // BOOT button (GPIO0) + { MP_ROM_QSTR(MP_QSTR_BUTTON), MP_ROM_PTR(&pin_GPIO0) }, + { MP_ROM_QSTR(MP_QSTR_BOOT), MP_ROM_PTR(&pin_GPIO0) }, + { MP_ROM_QSTR(MP_QSTR_D0), MP_ROM_PTR(&pin_GPIO0) }, + + // Safe GPIOs (no boot/strapping duties) - Side header pins + { MP_ROM_QSTR(MP_QSTR_D1), MP_ROM_PTR(&pin_GPIO1) }, + { MP_ROM_QSTR(MP_QSTR_A0), MP_ROM_PTR(&pin_GPIO1) }, + { MP_ROM_QSTR(MP_QSTR_D2), MP_ROM_PTR(&pin_GPIO2) }, + { MP_ROM_QSTR(MP_QSTR_A1), MP_ROM_PTR(&pin_GPIO2) }, + { MP_ROM_QSTR(MP_QSTR_D3), MP_ROM_PTR(&pin_GPIO3) }, // STRAPPING - JTAG source + { MP_ROM_QSTR(MP_QSTR_A2), MP_ROM_PTR(&pin_GPIO3) }, + { MP_ROM_QSTR(MP_QSTR_D4), MP_ROM_PTR(&pin_GPIO4) }, + { MP_ROM_QSTR(MP_QSTR_A3), MP_ROM_PTR(&pin_GPIO4) }, + { MP_ROM_QSTR(MP_QSTR_D5), MP_ROM_PTR(&pin_GPIO5) }, + { MP_ROM_QSTR(MP_QSTR_A4), MP_ROM_PTR(&pin_GPIO5) }, + { MP_ROM_QSTR(MP_QSTR_D6), MP_ROM_PTR(&pin_GPIO6) }, + { MP_ROM_QSTR(MP_QSTR_A5), MP_ROM_PTR(&pin_GPIO6) }, + { MP_ROM_QSTR(MP_QSTR_D7), MP_ROM_PTR(&pin_GPIO7) }, + { MP_ROM_QSTR(MP_QSTR_A6), MP_ROM_PTR(&pin_GPIO7) }, + { MP_ROM_QSTR(MP_QSTR_D8), MP_ROM_PTR(&pin_GPIO8) }, + { MP_ROM_QSTR(MP_QSTR_A7), MP_ROM_PTR(&pin_GPIO8) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO7) }, // I2C default + { MP_ROM_QSTR(MP_QSTR_D9), MP_ROM_PTR(&pin_GPIO9) }, + { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_GPIO9) }, + { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO10) }, + { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_GPIO10) }, + { MP_ROM_QSTR(MP_QSTR_VBAT), MP_ROM_PTR(&pin_GPIO10) }, // Battery voltage sense + { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO11) }, + { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO12) }, + { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO13) }, + { MP_ROM_QSTR(MP_QSTR_D14), MP_ROM_PTR(&pin_GPIO14) }, + { MP_ROM_QSTR(MP_QSTR_D15), MP_ROM_PTR(&pin_GPIO15) }, + { MP_ROM_QSTR(MP_QSTR_D16), MP_ROM_PTR(&pin_GPIO16) }, + { MP_ROM_QSTR(MP_QSTR_D17), MP_ROM_PTR(&pin_GPIO17) }, + { MP_ROM_QSTR(MP_QSTR_D18), MP_ROM_PTR(&pin_GPIO18) }, + { MP_ROM_QSTR(MP_QSTR_D21), MP_ROM_PTR(&pin_GPIO21) }, + + // Castellated pads on back + { MP_ROM_QSTR(MP_QSTR_D33), MP_ROM_PTR(&pin_GPIO33) }, + { MP_ROM_QSTR(MP_QSTR_VBUS), MP_ROM_PTR(&pin_GPIO33) }, // 5V present sense + { MP_ROM_QSTR(MP_QSTR_D34), MP_ROM_PTR(&pin_GPIO34) }, + { MP_ROM_QSTR(MP_QSTR_D35), MP_ROM_PTR(&pin_GPIO35) }, + { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO35) }, + { MP_ROM_QSTR(MP_QSTR_D36), MP_ROM_PTR(&pin_GPIO36) }, + { MP_ROM_QSTR(MP_QSTR_SCK), MP_ROM_PTR(&pin_GPIO36) }, + { MP_ROM_QSTR(MP_QSTR_D37), MP_ROM_PTR(&pin_GPIO37) }, + { MP_ROM_QSTR(MP_QSTR_MISO), MP_ROM_PTR(&pin_GPIO37) }, + { MP_ROM_QSTR(MP_QSTR_D38), MP_ROM_PTR(&pin_GPIO38) }, + { MP_ROM_QSTR(MP_QSTR_D39), MP_ROM_PTR(&pin_GPIO39) }, // JTAG MTCK + { MP_ROM_QSTR(MP_QSTR_D40), MP_ROM_PTR(&pin_GPIO40) }, // JTAG MTDO + { MP_ROM_QSTR(MP_QSTR_D41), MP_ROM_PTR(&pin_GPIO41) }, // JTAG MTDI + { MP_ROM_QSTR(MP_QSTR_D42), MP_ROM_PTR(&pin_GPIO42) }, // JTAG MTMS + { MP_ROM_QSTR(MP_QSTR_D43), MP_ROM_PTR(&pin_GPIO43) }, + { MP_ROM_QSTR(MP_QSTR_TX), MP_ROM_PTR(&pin_GPIO43) }, // UART0 TX + { MP_ROM_QSTR(MP_QSTR_D44), MP_ROM_PTR(&pin_GPIO44) }, + { MP_ROM_QSTR(MP_QSTR_RX), MP_ROM_PTR(&pin_GPIO44) }, // UART0 RX + { MP_ROM_QSTR(MP_QSTR_D45), MP_ROM_PTR(&pin_GPIO45) }, // STRAPPING - VDD_SPI voltage + { MP_ROM_QSTR(MP_QSTR_D46), MP_ROM_PTR(&pin_GPIO46) }, // STRAPPING - ROM log/boot mode + { MP_ROM_QSTR(MP_QSTR_D47), MP_ROM_PTR(&pin_GPIO47) }, // Octal SPI clock (diff) + { MP_ROM_QSTR(MP_QSTR_D48), MP_ROM_PTR(&pin_GPIO48) }, + { MP_ROM_QSTR(MP_QSTR_RED_LED), MP_ROM_PTR(&pin_GPIO48) }, // Red power LED (static DC) + { MP_ROM_QSTR(MP_QSTR_NEOPIXEL), MP_ROM_PTR(&pin_GPIO48) }, // WS2812 RGB LED (coexists on same pin) + + // I2C aliases for default pins + { MP_ROM_QSTR(MP_QSTR_SCL), MP_ROM_PTR(&pin_GPIO6) }, + { MP_ROM_QSTR(MP_QSTR_SDA), MP_ROM_PTR(&pin_GPIO7) }, + + { MP_ROM_QSTR(MP_QSTR_I2C), MP_ROM_PTR(&board_i2c_obj) }, + { MP_ROM_QSTR(MP_QSTR_SPI), MP_ROM_PTR(&board_spi_obj) }, + { MP_ROM_QSTR(MP_QSTR_UART), MP_ROM_PTR(&board_uart_obj) }, +}; +MP_DEFINE_CONST_DICT(board_module_globals, board_module_globals_table); diff --git a/ports/espressif/boards/esp32s3_supermini/sdkconfig b/ports/espressif/boards/esp32s3_supermini/sdkconfig new file mode 100644 index 00000000000..313ae1710ac --- /dev/null +++ b/ports/espressif/boards/esp32s3_supermini/sdkconfig @@ -0,0 +1,9 @@ +# +# Espressif IoT Development Framework Configuration +# +# Component config +# + +# end of Component config + +# end of Espressif IoT Development Framework Configuration From 508ae4507d42118ee9d865f7993900eec1d034fb Mon Sep 17 00:00:00 2001 From: Unconditional One Date: Mon, 12 Oct 2026 13:06:10 +0300 Subject: [PATCH 2/2] Update pins.c - removed VBUS VBAT --- ports/espressif/boards/esp32s3_supermini/pins.c | 2 -- 1 file changed, 2 deletions(-) diff --git a/ports/espressif/boards/esp32s3_supermini/pins.c b/ports/espressif/boards/esp32s3_supermini/pins.c index ef5b0236ed6..a4137c3ae86 100644 --- a/ports/espressif/boards/esp32s3_supermini/pins.c +++ b/ports/espressif/boards/esp32s3_supermini/pins.c @@ -36,7 +36,6 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { { MP_ROM_QSTR(MP_QSTR_A8), MP_ROM_PTR(&pin_GPIO9) }, { MP_ROM_QSTR(MP_QSTR_D10), MP_ROM_PTR(&pin_GPIO10) }, { MP_ROM_QSTR(MP_QSTR_A9), MP_ROM_PTR(&pin_GPIO10) }, - { MP_ROM_QSTR(MP_QSTR_VBAT), MP_ROM_PTR(&pin_GPIO10) }, // Battery voltage sense { MP_ROM_QSTR(MP_QSTR_D11), MP_ROM_PTR(&pin_GPIO11) }, { MP_ROM_QSTR(MP_QSTR_D12), MP_ROM_PTR(&pin_GPIO12) }, { MP_ROM_QSTR(MP_QSTR_D13), MP_ROM_PTR(&pin_GPIO13) }, @@ -49,7 +48,6 @@ static const mp_rom_map_elem_t board_module_globals_table[] = { // Castellated pads on back { MP_ROM_QSTR(MP_QSTR_D33), MP_ROM_PTR(&pin_GPIO33) }, - { MP_ROM_QSTR(MP_QSTR_VBUS), MP_ROM_PTR(&pin_GPIO33) }, // 5V present sense { MP_ROM_QSTR(MP_QSTR_D34), MP_ROM_PTR(&pin_GPIO34) }, { MP_ROM_QSTR(MP_QSTR_D35), MP_ROM_PTR(&pin_GPIO35) }, { MP_ROM_QSTR(MP_QSTR_MOSI), MP_ROM_PTR(&pin_GPIO35) },