diff --git a/.github/workflows/ci.yml b/.github/workflows/ci.yml
index bcbff72..46ac856 100644
--- a/.github/workflows/ci.yml
+++ b/.github/workflows/ci.yml
@@ -55,3 +55,21 @@ jobs:
         run: npm test --prefix packages/tiny-engineer-antigravity
       - name: Claude Code package tests
         run: npm test --prefix packages/tiny-engineer-claude-code
+
+  pcb:
+    runs-on: ubuntu-24.04
+    steps:
+      - uses: actions/checkout@v4
+      - name: Install KiCad 10
+        run: |
+          sudo add-apt-repository -y ppa:kicad/kicad-10.0-releases
+          sudo apt-get update
+          sudo DEBIAN_FRONTEND=noninteractive apt-get install -y --no-install-recommends kicad
+          kicad-cli version
+      - name: ERC / DRC / expected-nets
+        run: python3 scripts/check_pcb.py --report-dir artifacts/pcb
+      - uses: actions/upload-artifact@v4
+        if: failure()
+        with:
+          name: pcb-reports
+          path: artifacts/pcb/
diff --git a/AGENTS.md b/AGENTS.md
index 349a88f..369930b 100644
--- a/AGENTS.md
+++ b/AGENTS.md
@@ -31,9 +31,10 @@ node scripts/expressions/test-assets.js
 npm test --prefix packages/tiny-engineer-cursor
 npm test --prefix packages/tiny-engineer-antigravity
 npm test --prefix packages/tiny-engineer-claude-code
+python3 scripts/check_pcb.py
 ```
 
-`pio test -e native` is not `pio run -e native`. Details: [docs/testing.md](docs/testing.md).
+`pio test -e native` is not `pio run -e native`. PCB checks need KiCad 10 (`python3 scripts/check_pcb.py`). Details: [docs/testing.md](docs/testing.md).
 
 Do **not** flash (`pio run -t upload`) unless the user asks.
 
@@ -70,7 +71,7 @@ Breaking rules, SemVer mapping, and examples: [CONTRIBUTING.md](CONTRIBUTING.md)
 - **Settings** — layer checklist in [docs/settings.md](docs/settings.md). Never log raw `access_token`.
 - **Integrations** — add/extend package tests; prefer short timeouts and ignore network errors so a missing robot does not stall the agent.
 - **CAD** — edit `.f3d` **and** export affected `3mf`. CERN-OHL-S. Do not swap `AiEmblem.3mf` as branding.
-- **PCB** — [docs/pcb.md](docs/pcb.md) checklist + KiCad review rules below. New board paths need `REUSE.toml`. CERN-OHL-S.
+- **PCB** — [docs/pcb.md](docs/pcb.md) checklist + KiCad review rules below. Run `python3 scripts/check_pcb.py` (KiCad 10). New board paths need `REUSE.toml`. CERN-OHL-S.
 - **Motion** — poses −1..1 mapped to saved min/max; see [docs/robot-movement.md](docs/robot-movement.md). Do not widen NVS servo clamps without testing on a real robot.
 - **Secrets** — no `.env`, tokens, or Wi-Fi passwords in logs or screenshots.
 
diff --git a/CONTRIBUTING.md b/CONTRIBUTING.md
index efa5726..1e6893c 100644
--- a/CONTRIBUTING.md
+++ b/CONTRIBUTING.md
@@ -44,9 +44,10 @@ node scripts/expressions/test-assets.js
 npm test --prefix packages/tiny-engineer-cursor
 npm test --prefix packages/tiny-engineer-antigravity
 npm test --prefix packages/tiny-engineer-claude-code
+python3 scripts/check_pcb.py
 ```
 
-`pio test -e native` is not `pio run -e native`. Details: [docs/testing.md](docs/testing.md). Flash locally with `pio run -t upload` when you have a board. Physical module is a **Waveshare ESP32-C3-Zero**; PlatformIO `board = esp32-c3-devkitm-1` is the build target name.
+`pio test -e native` is not `pio run -e native`. PCB checks need KiCad 10 (`python3 scripts/check_pcb.py`). Details: [docs/testing.md](docs/testing.md). Flash locally with `pio run -t upload` when you have a board. Physical module is a **Waveshare ESP32-C3-Zero**; PlatformIO `board = esp32-c3-devkitm-1` is the build target name.
 
 ## By change type
 
@@ -60,7 +61,7 @@ npm test --prefix packages/tiny-engineer-claude-code
 
 **CAD.** Edit [`3d_models/cad/TinyEngineer.f3d`](3d_models/cad/TinyEngineer.f3d) **and** export the affected [`3d_models/parts/{servo_id}/3mf/*.3mf`](3d_models/parts/). Keep CERN-OHL-S. Do not swap `AiEmblem.3mf` as a branding change.
 
-**PCB.** Follow the [PCB checklist](docs/pcb.md#checklist). Keep [`expected-nets.yml`](docs/pcb.md#expected-nets-yml) in sync. One board per `hardware/boards/<name>/`, KiCad 10, ERC and DRC reviewed, no generated Gerbers or other fab outputs. Keep CERN-OHL-S. New board paths need a matching `[[annotations]]` block in [REUSE.toml](REUSE.toml).
+**PCB.** Follow the [PCB checklist](docs/pcb.md#checklist). Run `python3 scripts/check_pcb.py` before opening a PCB PR. Keep [`expected-nets.yml`](docs/pcb.md#expected-nets-yml) in sync. One board per `hardware/boards/<name>/`, KiCad 10, ERC and DRC reviewed, no generated Gerbers or other fab outputs. Keep CERN-OHL-S. New board paths need a matching `[[annotations]]` block in [REUSE.toml](REUSE.toml).
 
 **Motion.** Animations use −1..1 poses mapped to the saved min/max in [docs/robot-movement.md](docs/robot-movement.md). Stock defaults live in [`include/servos.h`](include/servos.h). Do not widen NVS servo clamps without testing on a real robot. Setup AP `POST /setup/servo` can use 0–180° to find limits; assembled motion must not.
 
diff --git a/REUSE.toml b/REUSE.toml
index 044aa7f..3789532 100644
--- a/REUSE.toml
+++ b/REUSE.toml
@@ -26,6 +26,11 @@ path = "hardware/boards/**"
 SPDX-FileCopyrightText = "2026 Krzysztof Jamroz"
 SPDX-License-Identifier = "CERN-OHL-S-2.0"
 
+[[annotations]]
+path = "hardware/boards/main-control-board/**"
+SPDX-FileCopyrightText = "2026 Krzysztof Jamroz"
+SPDX-License-Identifier = "CERN-OHL-S-2.0"
+
 [[annotations]]
 path = "hardware/LICENSE"
 SPDX-License-Identifier = "CERN-OHL-S-2.0"
diff --git a/docs/hardware/components.md b/docs/hardware/components.md
index de8086e..e706bc4 100644
--- a/docs/hardware/components.md
+++ b/docs/hardware/components.md
@@ -54,7 +54,7 @@ Constants cited below match [`include/pins.h`](../../include/pins.h).
 | Interface | I2C |
 | Address | `0x40` (`PCA9685_ADDRESS` in firmware). A0–A5 pads can change this |
 | PWM | 12-bit, firmware `setPWMFreq(50)` |
-| Important pins | As drawn: **5V** (servo-rail in), **V+** (to servo 5V), **VCC** (3V3 logic), **GND**, **SDA**, **SCL**, **PWM**. OE not drawn |
+| Important pins | As drawn: **5V** (servo-rail in), **V+** (to servo 5V), **VCC** (3V3 logic), **GND**, **SDA**, **SCL**, **PWM**. **OE** (GP5) is pending, not implemented |
 | Channels used | 0–4 (five servos). 5–15 unused |
 | Limits | **V+** and **VCC** must stay separate. Do not jumper servo power onto logic VCC on this robot |
 | Firmware note | Detection at `0x40` is a **hard fail** in the bring-up test |
diff --git a/docs/hardware/interfaces.md b/docs/hardware/interfaces.md
index 3348aed..ef30784 100644
--- a/docs/hardware/interfaces.md
+++ b/docs/hardware/interfaces.md
@@ -57,13 +57,13 @@ Generated by **PCA9685**, not by ESP32 LEDC/MCPWM.
 
 ESP32 GPIO is not wired to servo SIG lines.
 
-### PCA9685 output enable (optional)
+### PCA9685 output enable
 
 | Signal | ESP32 GPIO | Notes |
 | --- | --- | --- |
 | OE | GPIO5 / GP5 | **Active LOW** — outputs enabled. Firmware drives **HIGH** during PCA9685 init, then **LOW** after neutral PWM is written |
 
-Controlled only when `PCA9685_OE_WIRED = true` in [`include/pins.h`](../../include/pins.h). Default `false`: OE pin unused (Adafruit breakout pull-down keeps outputs enabled). Wire GP5 → PCA9685 **OE** and set the flag to block invalid PWM during boot and flash resets.
+Not wired (`PCA9685_OE_WIRED = false` in [`include/pins.h`](../../include/pins.h)). Firmware keeps OE helpers behind that flag. Blocks invalid PWM during boot and flash resets when the net exists.
 
 ## USB
 
diff --git a/docs/hardware/pinout.md b/docs/hardware/pinout.md
index eafa914..5e228e9 100644
--- a/docs/hardware/pinout.md
+++ b/docs/hardware/pinout.md
@@ -11,7 +11,7 @@ Source of truth: [`include/pins.h`](../../include/pins.h). This file must match
 | I2S BCLK | **GPIO2** (diagram **GP2**) | `I2S_BCLK` | MAX98357A BCLK |
 | I2S LRCLK / WS | **GPIO3** (diagram **GP3**) | `I2S_LRC` | MAX98357A **LRC** |
 | I2S DATA OUT | **GPIO4** (diagram **GP4**) | `I2S_DIN` | MAX98357A DIN |
-| PCA9685 OE (optional) | **GPIO5** (diagram **GP5**) | `PCA9685_OE_PIN` | PCA9685 **OE** when `PCA9685_OE_WIRED` |
+| PCA9685 OE | **GPIO5** (diagram **GP5**) | `PCA9685_OE_PIN` | reserved for PCA9685 **OE**; net pending (`PCA9685_OE_WIRED`) |
 | Built-in WS2812 RGB | **GPIO10** | `RGB_LED_PIN` | onboard LED only |
 
 Logic level: **3.3 V**.
@@ -30,7 +30,6 @@ Logic level: **3.3 V**.
 
 | GPIO | Status | Notes |
 | --- | --- | --- |
-| GPIO5 | **Optional** | PCA9685 **OE** when wired; set `PCA9685_OE_WIRED = true` in `pins.h` |
 | GPIO6 | Free | Unused |
 | GPIO7 | Free | Unused |
 | GPIO8 | Free | Unused |
@@ -60,7 +59,7 @@ Power pads (not GPIO): **5V**, **GND**, **3V3**.
 | `OLED_WIDTH` / `OLED_HEIGHT` | 128 / 32 | Display |
 | `SERVO_MIN_US` / `SERVO_MAX_US` | 800 / 2200 | Electrical PWM span |
 | `SERVO_BOOT_SPEED_DEG_S` | 35 | Boot centering / sleep-pose rate (deg/s) |
-| `PCA9685_OE_WIRED` | `false` | Set `true` after wiring GP5 → PCA9685 OE |
+| `PCA9685_OE_WIRED` | `false` | pending GP5 → PCA9685 OE (not on schematic/PCB yet) |
 
 ## Pin allocation rules
 
diff --git a/docs/hardware/servos.md b/docs/hardware/servos.md
index eb1d598..d2e1893 100644
--- a/docs/hardware/servos.md
+++ b/docs/hardware/servos.md
@@ -48,12 +48,12 @@ Verified in [`include/pins.h`](../../include/pins.h) and [`include/servos.h`](..
 
 On every boot (and after each flash reset):
 
-1. **Optional OE** — if `PCA9685_OE_WIRED`, GP5 disables PCA9685 outputs before I2C init.
+1. **OE** — `PCA9685_OE_WIRED` is false until a tested GP5→OE board exists; firmware skips the OE pin.
 2. **Early init** — PCA9685 is probed and configured immediately after `Wire.begin`, before OLED, settings, or Wi-Fi.
-3. **Neutral park** — all channels receive mid-pulse PWM while OE is still disabled (if wired), then outputs enable.
+3. **Neutral park** — all channels receive mid-pulse PWM (OE enable is skipped while unwired).
 4. **Smooth boot moves** — `centerAllServos()` and sleep-inertia pose use `servoMoveAllSmoothTo()` at `SERVO_BOOT_SPEED_DEG_S` (35°/s), not instant snaps.
 
-Set `PCA9685_OE_WIRED = true` in [`include/pins.h`](../../include/pins.h) after wiring GP5 → PCA9685 **OE**. OE is **active LOW** on the Adafruit breakout.
+GP5 → PCA9685 **OE** is planned, not implemented (`PCA9685_OE_WIRED = false` in [`include/pins.h`](../../include/pins.h)). OE is **active LOW** on the Adafruit breakout when that net exists.
 
 ## Idle and sleep PWM release
 
diff --git a/docs/hardware/testing.md b/docs/hardware/testing.md
index 39cfe58..50b9729 100644
--- a/docs/hardware/testing.md
+++ b/docs/hardware/testing.md
@@ -19,7 +19,7 @@ Build/flash: [flash.md](../flash.md) (`pio run`, `pio run -t upload`, serial 115
 | --- | --- |
 | Built-in WS2812 | Green ready (GPIO10) |
 | I2C init | `Wire.begin` on GPIO0/GPIO1 |
-| PCA9685 | Probe `0x40` early; park neutral; optional OE on GP5 |
+| PCA9685 | Probe `0x40` early; park neutral; OE skipped (`PCA9685_OE_WIRED` is false until GP5→OE is implemented) |
 | OLED | Probe `0x3C`, init (optional) |
 | Wi-Fi | STA connect from saved NVS credentials, or setup AP `TinyEngineer-XXXX` when unset/failed; mDNS `{hostname}.local` after STA connect |
 | MAX98357A / I2S | `I2S.begin` 44.1 kHz 16-bit stereo |
diff --git a/docs/hardware/wiring.md b/docs/hardware/wiring.md
index 98a930a..e371ee7 100644
--- a/docs/hardware/wiring.md
+++ b/docs/hardware/wiring.md
@@ -66,7 +66,6 @@ On Adafruit PCA9685, header/terminal **V+** is normally the same servo rail as t
 | ESP32-C3-Zero | GP2 | MAX98357A | BCLK | I2S bit clock |
 | ESP32-C3-Zero | GP3 | MAX98357A | LRC | I2S word select |
 | ESP32-C3-Zero | GP4 | MAX98357A | DIN | I2S data |
-| ESP32-C3-Zero | GP5 | PCA9685 | OE | Optional output enable (see [interfaces.md](interfaces.md)) |
 | PCA9685 | PWM | Servo | SIG | Servo PWM |
 | PCA9685 | V+ | Servo | 5V | Servo power |
 | PCA9685 | GND (servo side) | Servo | GND | Servo ground |
@@ -142,11 +141,11 @@ Firmware drives **channels 0–4** (`SERVO_SPECS` / `SERVO_HEAD`…`SERVO_BODY`)
 
 ESP32-C3-Zero, unused in the PNG:
 
-**GP6, GP7, GP8, GP9, GP10, GP20, GP21**
+**GP5, GP6, GP7, GP8, GP9, GP10, GP20, GP21**
 
-GP5 = optional PCA9685 OE (not in PNG). GP9 = BOOT, GP10 = onboard WS2812. GP18/GP19 = native USB — wire from 5993 D−/D+ even if the base PNG omits them. See [pinout.md](pinout.md).
+GP5 is reserved for PCA9685 OE (`PCA9685_OE_PIN`) but that net is **pending**: schematic and PCB do not implement or validate GP5→OE yet (`PCA9685_OE_WIRED = false`). GP9 = BOOT, GP10 = onboard WS2812. GP18/GP19 = native USB — wire from 5993 D−/D+ even if the base PNG omits them. See [pinout.md](pinout.md).
 
-PCA9685 **OE** optional on GP5 — not drawn on base PNG. MAX98357A **GAIN** / **SD** not wired (breakout defaults). **SPK+** / **SPK-** not drawn.
+PCA9685 **OE** is not wired on this board. MAX98357A **GAIN** / **SD** not wired (breakout defaults). **SPK+** / **SPK-** not drawn.
 
 ## Not on the drawing
 
diff --git a/docs/pcb.md b/docs/pcb.md
index 51d2fa3..3c7bd00 100644
--- a/docs/pcb.md
+++ b/docs/pcb.md
@@ -4,7 +4,7 @@ Baseline for contributing KiCad PCB designs. Goal: boards that are easy to under
 
 Before opening a PR, run the [checklist](#checklist).
 
-Workflow and automated validation are still evolving. A reference board and CI pipeline are in progress and will be used to validate these rules.
+Workflow and automated validation: CI runs ERC, DRC, and `expected-nets.yml` via `python3 scripts/check_pcb.py` (see [testing.md](testing.md)).
 
 KiCad sources live in [`hardware/boards/`](../hardware/README.md). Robot electrical reference (pinout, wiring, BOM) stays in [`docs/hardware/`](hardware/README.md). Firmware drivers stay in `src/hardware/`.
 
@@ -108,27 +108,33 @@ Before submitting or updating a hardware pull request:
 
 The project should not introduce unexplained ERC or DRC errors.
 
-Automated ERC and DRC via GitHub Actions is planned and is being tested on a reference board. It is not required yet.
+Run the same checks CI uses (KiCad 10, stdlib Python — no pip packages):
+
+```bash
+python3 scripts/check_pcb.py
+```
+
+Errors fail; warnings do not. Reports go to a temp dir, or pass `--report-dir artifacts/pcb`. CI runs this on every push/PR ([`.github/workflows/ci.yml`](../.github/workflows/ci.yml)).
 
 ## expected-nets.yml
 
 Committed checklist of **critical** net → pin memberships for human/AI review. Not a full netlist dump.
 
 - **Path:** `hardware/boards/<board-name>/expected-nets.yml`
-- **Check:** `kicad-cli sch export netlist`, then compare to this file. No `kicad-cli` → say so and skip connectivity claims ([AGENTS.md](../AGENTS.md)).
+- **Check:** `python3 scripts/check_pcb.py` (exports netlist via `kicad-cli` and compares). Manual: `kicad-cli sch export netlist`, then compare to this file. No `kicad-cli` → say so and skip connectivity claims ([AGENTS.md](../AGENTS.md)).
 - **Do not** infer nets from `.kicad_sch` / `.kicad_pcb` coordinates or geometry.
 - **Update** when you intentionally change listed nets or pins. Keep the list to power and important buses (I2C, I2S, USB, …), not every net.
 
-Minimal shape (pin tokens = KiCad netlist `RefDes.PinName`):
+Minimal shape (pin tokens = KiCad netlist `RefDes.PinNum:PinName` — pin number plus symbol pin name, so duplicate names like multiple `GND` pins stay distinct):
 
 ```yaml
 nets:
   "+5V":
-    - ESP1.5V
-    - PCA1.V+
+    - ESP1.1:5V
+    - PCA1.6:V+
   GND:
-    - ESP1.GND
-    - PCA1.GND
+    - ESP1.2:GND
+    - PCA1.1:GND
 ```
 
 Required for new or updated boards when claiming connectivity in a PR.
@@ -211,8 +217,7 @@ Use this before opening or updating a PCB pull request. Details are in the secti
 
 **Quality and docs**
 
-- [ ] ERC run; violations reviewed
-- [ ] DRC run; violations reviewed
+- [ ] ERC / DRC / expected-nets: `python3 scripts/check_pcb.py` passes (or GUI ERC+DRC reviewed if no `kicad-cli`; do not claim connectivity or net checks without `kicad-cli`)
 - [ ] No suppressions used only to make checks pass; any intentional exception has a reason
 - [ ] `expected-nets.yml` present and matches current netlist for listed nets
 - [ ] Board `README.md` covers purpose, status, interfaces, assumptions, and whether this revision was manufactured and tested
@@ -233,10 +238,8 @@ Existing in-progress PRs: align where reasonably possible. Do not redesign solel
 
 The requirements above are the current contribution baseline.
 
-Not standardized yet (to be evaluated on the reference board):
+Not standardized yet:
 
-- automated KiCad ERC and DRC in GitHub Actions
-- exact multi-board CI structure
 - manufacturing jobsets
 - automated manufacturing artifacts
 - release and prerelease manufacturing packages
@@ -244,6 +247,6 @@ Not standardized yet (to be evaluated on the reference board):
 - automated PCB renders or visual diffs
 - manufacturer-specific output configurations
 
-Once the reference implementation is validated, this page will be updated. Stable parts of the workflow may become required for new hardware contributions.
+ERC, DRC, and `expected-nets.yml` checks run in CI via `python3 scripts/check_pcb.py`.
 
 Keep the workflow reproducible and safe. Avoid complexity until it solves a real problem.
diff --git a/docs/testing.md b/docs/testing.md
index cdcbeef..43bb968 100644
--- a/docs/testing.md
+++ b/docs/testing.md
@@ -1,6 +1,6 @@
 # Tests
 
-Host checks. These commands do not flash the board. GitHub Actions on `main` and PRs runs these same commands. On-device hardware: [hardware/testing.md](hardware/testing.md).
+Host checks. These commands do not flash the board. GitHub Actions on `main` and PRs runs these same commands (firmware, packages, and PCB). On-device hardware: [hardware/testing.md](hardware/testing.md).
 
 ## Firmware
 
@@ -34,3 +34,13 @@ npm test --prefix packages/tiny-engineer-cursor
 npm test --prefix packages/tiny-engineer-antigravity
 npm test --prefix packages/tiny-engineer-claude-code
 ```
+
+## PCB
+
+KiCad 10 (`kicad-cli`). Stdlib Python only — no pip packages. ERC (errors), DRC (errors + schematic parity), and `expected-nets.yml` for every board under `hardware/boards/`.
+
+```bash
+python3 scripts/check_pcb.py
+```
+
+Optional: `python3 scripts/check_pcb.py main-control-board --report-dir artifacts/pcb`. Details: [pcb.md](pcb.md). On-device hardware: [hardware/testing.md](hardware/testing.md).
\ No newline at end of file
diff --git a/hardware/.gitignore b/hardware/.gitignore
new file mode 100644
index 0000000..c1e7e4d
--- /dev/null
+++ b/hardware/.gitignore
@@ -0,0 +1,4 @@
+*.bak
+gerbers/
+production/
+fabrication-toolkit-options.json
\ No newline at end of file
diff --git a/hardware/README.md b/hardware/README.md
index c63e3de..84dc836 100644
--- a/hardware/README.md
+++ b/hardware/README.md
@@ -4,7 +4,11 @@ KiCad PCB projects for Tiny Engineer.
 
 Boards live under `boards/<board-name>/`. Prefer the same name for the directory and the KiCad project.
 
-Contribution rules, KiCad version, what to commit, ERC/DRC, and PR expectations: [docs/pcb.md](../docs/pcb.md). Pre-PR checklist: [docs/pcb.md#checklist](../docs/pcb.md#checklist). Critical net checklist: [docs/pcb.md#expected-nets-yml](../docs/pcb.md#expected-nets-yml).
+| Board | Role |
+| --- | --- |
+| [`main-control-board`](boards/main-control-board/) | Draft interconnect / carrier (header sockets for existing modules) |
+
+Contribution rules, KiCad version, what to commit, ERC/DRC, and PR expectations: [docs/pcb.md](../docs/pcb.md). Pre-PR checklist: [docs/pcb.md#checklist](../docs/pcb.md#checklist). Critical net checklist: [docs/pcb.md#expected-nets-yml](../docs/pcb.md#expected-nets-yml). Local/CI checks: `python3 scripts/check_pcb.py` (KiCad 10) — [docs/testing.md](../docs/testing.md).
 
 This tree is KiCad source only. Robot electrical reference (pinout, wiring, BOM) is [`docs/hardware/`](../docs/hardware/README.md). Firmware drivers are `src/hardware/`.
 
diff --git a/hardware/boards/main-control-board/README.md b/hardware/boards/main-control-board/README.md
new file mode 100644
index 0000000..7018025
--- /dev/null
+++ b/hardware/boards/main-control-board/README.md
@@ -0,0 +1,20 @@
+# main-control-board
+
+Carrier PCB that reduces jumper wiring: existing modules plug in on pin headers.
+
+- **Purpose:** interconnect / carrier with header sockets for the existing modules
+- **Status:** draft (schematic + routed layout, rev v1 / 2026-09-12)
+- **KiCad:** 10
+- **Interfaces:** header sockets for the Waveshare ESP32-C3-Zero, Adafruit PCA9685, MAX98357A, SSD1306 OLED, and Adafruit 5993 USB-C breakout; shared I2C (ESP32 GP0/GP1 → PCA9685 and SSD1306 OLED); point-to-point I2S (ESP32 GP2/GP3/GP4 → MAX98357A BCLK/LRC/DIN); USB D+/D− (5993 → ESP32 GP19/GP18); PCA9685 OE ← GP5; +5V, 3V3, and GND. Servo 3-pin plugs and speaker terminals stay on the modules this revision.
+- **Assumptions:** nets follow [`docs/hardware/`](../../../docs/hardware/README.md) (keep servo **+5V** off logic **3V3**; common GND). Custom module symbols live in [`libraries/symbols/tiny_engineer_modules.kicad_sym`](libraries/symbols/tiny_engineer_modules.kicad_sym); footprints in [`libraries/footprints/tiny_engineer_modules.pretty`](libraries/footprints/tiny_engineer_modules.pretty). ESP32-C3-Zero symbol pin numbers are Waveshare **header pads** (pad 1 = 5V, numbered anticlockwise from USB), not the ESP32-C3 QFN package. Two-layer FR4 ~1.6 mm; ESP32-C3-Zero on the back, other modules on the front. OLED uses a 1×04 pin header; USB-C breakout uses a 1×04 pin socket. Netclasses: `GND`, `Power5V` (`+5V`, 1.5 mm), `Power3V3` (`+3.3V`, 0.4 mm), `USB` (`/USB_`*), `Default` (I2C/I2S and other signals).
+- **ERC / DRC:** ERC passed; DRC passed (custom rules in `main-control-board.kicad_dru`)
+- **Built:** not manufactured
+- **Tested:** not tested
+
+## Direction
+
+First revision is sockets only. Design in KiCad 10, then fabricate, so the robot is wired on a board instead of Dupont harnesses.
+
+Later revisions may integrate some or all of those functions onto this PCB and drop the plug-in modules.
+
+Contribution rules: [`docs/pcb.md`](../../../docs/pcb.md).
diff --git a/hardware/boards/main-control-board/expected-nets.yml b/hardware/boards/main-control-board/expected-nets.yml
new file mode 100644
index 0000000..66b6c99
--- /dev/null
+++ b/hardware/boards/main-control-board/expected-nets.yml
@@ -0,0 +1,53 @@
+# Critical net → pin memberships for review.
+# Tokens = KiCad netlist RefDes.PinNum:PinName (pin number + symbol pin name).
+# Compare with: kicad-cli sch export netlist
+# See docs/pcb.md#expected-netsyml
+
+nets:
+  "+5V":
+    - J1.7:Pin_7
+    - J3.1:Pin_1
+    - J4.1:Pin_1
+    - J6.1:Pin_1
+    - J7.3:Pin_3
+  "+3.3V":
+    - J2.1:Pin_1
+    - J3.2:Pin_2
+    - J4.2:Pin_2
+    - J6.3:Pin_3
+  GND:
+    - J1.6:Pin_6
+    - J2.2:Pin_2
+    - J3.6:Pin_6
+    - J4.6:Pin_6
+    - J6.2:Pin_2
+    - J7.4:Pin_4
+  "/I2C_SDA":
+    - J2.3:Pin_3
+    - J3.3:Pin_3
+    - J4.3:Pin_3
+    - J6.4:Pin_4
+  "/I2C_SCL":
+    - J2.4:Pin_4
+    - J3.4:Pin_4
+    - J4.4:Pin_4
+    - J6.5:Pin_5
+  "/I2S_BCLK":
+    - J1.2:Pin_2
+    - J6.6:Pin_6
+  "/I2S_LRC":
+    - J1.1:Pin_1
+    - J6.7:Pin_7
+  "/I2S_DIN":
+    - J1.3:Pin_3
+    - J6.8:Pin_8
+  "Net-(J3-Pin_5)":
+    - J3.5:Pin_5
+    - J4.5:Pin_5
+    - J6.9:Pin_9
+  "/USB_D+":
+    - J5.7:Pin_7
+    - J7.1:Pin_1
+  "/USB_D-":
+    - J5.6:Pin_6
+    - J7.2:Pin_2
diff --git a/hardware/boards/main-control-board/fp-lib-table b/hardware/boards/main-control-board/fp-lib-table
new file mode 100644
index 0000000..e05f5c0
--- /dev/null
+++ b/hardware/boards/main-control-board/fp-lib-table
@@ -0,0 +1,4 @@
+(fp_lib_table
+	(version 7)
+	(lib (name "TinyEngineerModules") (type "KiCad") (uri "${KIPRJMOD}/libraries/footprints/tiny_engineer_modules.pretty") (options "") (descr ""))
+)
diff --git a/hardware/boards/main-control-board/libraries/footprints/tiny_engineer_modules.pretty/ESP32_C3_Zero_Dev_Board.kicad_mod b/hardware/boards/main-control-board/libraries/footprints/tiny_engineer_modules.pretty/ESP32_C3_Zero_Dev_Board.kicad_mod
new file mode 100644
index 0000000..a4fa8ea
--- /dev/null
+++ b/hardware/boards/main-control-board/libraries/footprints/tiny_engineer_modules.pretty/ESP32_C3_Zero_Dev_Board.kicad_mod
@@ -0,0 +1,628 @@
+(footprint "ESP32_C3_Zero_Dev_Board"
+	(version 20260206)
+	(generator "pcbnew")
+	(generator_version "10.0")
+	(layer "F.Cu")
+	(property "Reference" "REF**"
+		(at 0 13 0)
+		(unlocked yes)
+		(layer "F.SilkS")
+		(uuid "67158926-b292-4f65-a109-848aae5bc929")
+		(effects
+			(font
+				(size 1 1)
+				(thickness 0.12)
+			)
+		)
+	)
+	(property "Value" "ESP32_C3_Zero_Dev_Board"
+		(at -0.1 15.24 0)
+		(unlocked yes)
+		(layer "F.Fab")
+		(uuid "e8ffb888-95ec-4a1e-a86b-ac20f9a6e75a")
+		(effects
+			(font
+				(size 1 1)
+				(thickness 0.15)
+			)
+		)
+	)
+	(property "Datasheet" ""
+		(at 0 0 0)
+		(unlocked yes)
+		(layer "F.Fab")
+		(hide yes)
+		(uuid "236e36c4-46ba-414a-bcd1-37c543e02b91")
+		(effects
+			(font
+				(size 1 1)
+				(thickness 0.15)
+			)
+		)
+	)
+	(property "Description" ""
+		(at 0 0 0)
+		(unlocked yes)
+		(layer "F.Fab")
+		(hide yes)
+		(uuid "eb66ab46-0f2a-49fc-932e-26d732d45109")
+		(effects
+			(font
+				(size 1 1)
+				(thickness 0.15)
+			)
+		)
+	)
+	(attr through_hole)
+	(duplicate_pad_numbers_are_jumpers no)
+	(fp_line
+		(start -9.5 -11.9)
+		(end 9.3 -11.9)
+		(stroke
+			(width 0.1)
+			(type default)
+		)
+		(layer "F.SilkS")
+		(uuid "34e3000d-1e83-44f1-a4ab-4110ee711d2b")
+	)
+	(fp_line
+		(start -9.5 11.9)
+		(end -9.5 -11.9)
+		(stroke
+			(width 0.1)
+			(type default)
+		)
+		(layer "F.SilkS")
+		(uuid "69445495-519d-4210-8a7f-8ca153b131cf")
+	)
+	(fp_line
+		(start -4.6 -13.4)
+		(end -4.6 -11.9)
+		(stroke
+			(width 0.1)
+			(type dot)
+		)
+		(layer "F.SilkS")
+		(uuid "0d7a8112-068f-4923-90f0-804b54f44a32")
+	)
+	(fp_line
+		(start -4.6 -13.4)
+		(end 4.4 -13.4)
+		(stroke
+			(width 0.1)
+			(type dot)
+		)
+		(layer "F.SilkS")
+		(uuid "935fb6a1-35f4-45ff-a214-d837c81b406d")
+	)
+	(fp_line
+		(start 4.4 -13.4)
+		(end 4.4 -11.9)
+		(stroke
+			(width 0.1)
+			(type dot)
+		)
+		(layer "F.SilkS")
+		(uuid "a8a10797-554b-41a0-b8cc-943af2dfaa7c")
+	)
+	(fp_line
+		(start 9.3 -11.9)
+		(end 9.3 11.9)
+		(stroke
+			(width 0.1)
+			(type default)
+		)
+		(layer "F.SilkS")
+		(uuid "43c44519-55e3-4dff-84e8-3dcd84b8f3c9")
+	)
+	(fp_line
+		(start 9.3 11.9)
+		(end -9.5 11.9)
+		(stroke
+			(width 0.1)
+			(type default)
+		)
+		(layer "F.SilkS")
+		(uuid "8573d8b3-8362-4362-8e39-1a7f6fc6fc7b")
+	)
+	(fp_rect
+		(start -6.6 6.5)
+		(end 6.6 11.4)
+		(stroke
+			(width 0.1)
+			(type dot)
+		)
+		(fill no)
+		(layer "F.SilkS")
+		(uuid "c1b73b2c-bb16-4b55-a767-c1b5659b1508")
+	)
+	(fp_poly
+		(pts
+			(xy -9.5 -11.9) (xy -9.5 11.9) (xy 9.3 11.9) (xy 9.3 -11.9)
+		)
+		(stroke
+			(width 0.1)
+			(type solid)
+		)
+		(fill no)
+		(layer "F.CrtYd")
+		(uuid "776f451f-172d-4858-b6fa-5ea06bbee9dd")
+	)
+	(fp_text user "5V"
+		(at -6.35 -10.16 0)
+		(unlocked yes)
+		(layer "F.SilkS")
+		(uuid "4dedc7ad-45d4-4678-9095-9b2e78d493b8")
+		(effects
+			(font
+				(size 0.8 0.8)
+				(thickness 0.12)
+			)
+			(justify left)
+		)
+	)
+	(fp_text user "GND"
+		(at -6.35 -7.62 0)
+		(unlocked yes)
+		(layer "F.SilkS")
+		(uuid "2787ab48-337b-48a9-b174-eeda0e9656db")
+		(effects
+			(font
+				(size 0.8 0.8)
+				(thickness 0.12)
+			)
+			(justify left)
+		)
+	)
+	(fp_text user "3V3"
+		(at -6.35 -5.08 0)
+		(unlocked yes)
+		(layer "F.SilkS")
+		(uuid "92887545-e8f2-4703-b5e5-a832f460ef59")
+		(effects
+			(font
+				(size 0.8 0.8)
+				(thickness 0.12)
+			)
+			(justify left)
+		)
+	)
+	(fp_text user "GP0"
+		(at -6.35 -2.54 0)
+		(unlocked yes)
+		(layer "F.SilkS")
+		(uuid "4c314571-97fd-47fa-9a3f-fbdfebbf3aed")
+		(effects
+			(font
+				(size 0.8 0.8)
+				(thickness 0.12)
+			)
+			(justify left)
+		)
+	)
+	(fp_text user "GP1"
+		(at -6.35 0 0)
+		(unlocked yes)
+		(layer "F.SilkS")
+		(uuid "2b8a6e5e-b227-4a36-bfee-2249e44f7e46")
+		(effects
+			(font
+				(size 0.8 0.8)
+				(thickness 0.12)
+			)
+			(justify left)
+		)
+	)
+	(fp_text user "GP2"
+		(at -6.35 2.54 0)
+		(unlocked yes)
+		(layer "F.SilkS")
+		(uuid "7916cb9a-5f38-455f-8367-960b80e5642b")
+		(effects
+			(font
+				(size 0.8 0.8)
+				(thickness 0.12)
+			)
+			(justify left)
+		)
+	)
+	(fp_text user "GP3"
+		(at -6.35 5.08 0)
+		(unlocked yes)
+		(layer "F.SilkS")
+		(uuid "d32fa86f-d366-48b1-aaf7-42ef14070b11")
+		(effects
+			(font
+				(size 0.8 0.8)
+				(thickness 0.12)
+			)
+			(justify left)
+		)
+	)
+	(fp_text user "GP4"
+		(at -6.35 7.62 0)
+		(unlocked yes)
+		(layer "F.SilkS")
+		(uuid "2fc31eee-e787-47ef-86c5-ba1df77626b5")
+		(effects
+			(font
+				(size 0.8 0.8)
+				(thickness 0.12)
+			)
+			(justify left)
+		)
+	)
+	(fp_text user "GP5"
+		(at -6.35 10.16 0)
+		(unlocked yes)
+		(layer "F.SilkS")
+		(uuid "3721c142-a315-4f15-ab98-842eb1982f53")
+		(effects
+			(font
+				(size 0.8 0.8)
+				(thickness 0.12)
+			)
+			(justify left)
+		)
+	)
+	(fp_text user "USB"
+		(at -1.3 -12.2 0)
+		(unlocked yes)
+		(layer "F.SilkS")
+		(uuid "149524f8-b5f8-407e-a771-0ca41ea7e2f3")
+		(effects
+			(font
+				(size 0.8 0.8)
+				(thickness 0.12)
+			)
+			(justify left bottom)
+		)
+	)
+	(fp_text user "ANT"
+		(at 0 9.1 0)
+		(unlocked yes)
+		(layer "F.SilkS")
+		(uuid "25bbe8e7-ecd7-4d35-afa5-7825822e5153")
+		(effects
+			(font
+				(size 0.8 0.8)
+				(thickness 0.12)
+			)
+		)
+	)
+	(fp_text user "TX"
+		(at 6.35 -10.16 0)
+		(unlocked yes)
+		(layer "F.SilkS")
+		(uuid "04d53a20-2399-42a9-ac38-dde86f9103ad")
+		(effects
+			(font
+				(size 0.8 0.8)
+				(thickness 0.12)
+			)
+			(justify right)
+		)
+	)
+	(fp_text user "RX"
+		(at 6.35 -7.62 0)
+		(unlocked yes)
+		(layer "F.SilkS")
+		(uuid "ab72257f-c46d-490a-a17c-2569b87913ad")
+		(effects
+			(font
+				(size 0.8 0.8)
+				(thickness 0.12)
+			)
+			(justify right)
+		)
+	)
+	(fp_text user "USB DP"
+		(at 6.35 -5.08 0)
+		(unlocked yes)
+		(layer "F.SilkS")
+		(uuid "dee8783b-5acf-4d6f-a957-ed17c1b181c1")
+		(effects
+			(font
+				(size 0.8 0.8)
+				(thickness 0.12)
+			)
+			(justify right)
+		)
+	)
+	(fp_text user "USB DM"
+		(at 6.35 -2.54 0)
+		(unlocked yes)
+		(layer "F.SilkS")
+		(uuid "624d1427-3118-4b0f-9b89-932f22924a76")
+		(effects
+			(font
+				(size 0.8 0.8)
+				(thickness 0.12)
+			)
+			(justify right)
+		)
+	)
+	(fp_text user "GP10"
+		(at 6.35 0 0)
+		(unlocked yes)
+		(layer "F.SilkS")
+		(uuid "2233f98f-cb54-40b5-80fc-7b97020d1cf1")
+		(effects
+			(font
+				(size 0.8 0.8)
+				(thickness 0.12)
+			)
+			(justify right)
+		)
+	)
+	(fp_text user "GP9"
+		(at 6.35 2.54 0)
+		(unlocked yes)
+		(layer "F.SilkS")
+		(uuid "800a1516-f745-4688-abe1-981233b7a747")
+		(effects
+			(font
+				(size 0.8 0.8)
+				(thickness 0.12)
+			)
+			(justify right)
+		)
+	)
+	(fp_text user "GP8"
+		(at 6.35 5.08 0)
+		(unlocked yes)
+		(layer "F.SilkS")
+		(uuid "dc54778f-788f-41e5-a782-c7743f461760")
+		(effects
+			(font
+				(size 0.8 0.8)
+				(thickness 0.12)
+			)
+			(justify right)
+		)
+	)
+	(fp_text user "GP7"
+		(at 6.35 7.62 0)
+		(unlocked yes)
+		(layer "F.SilkS")
+		(uuid "1ede5b0a-b3da-4231-bf6c-eadc5b57a8e5")
+		(effects
+			(font
+				(size 0.8 0.8)
+				(thickness 0.12)
+			)
+			(justify right)
+		)
+	)
+	(fp_text user "GP6"
+		(at 6.35 10.16 0)
+		(unlocked yes)
+		(layer "F.SilkS")
+		(uuid "d169d8e5-233a-4829-a98d-f3a415ff49eb")
+		(effects
+			(font
+				(size 0.8 0.8)
+				(thickness 0.12)
+			)
+			(justify right)
+		)
+	)
+	(fp_text user "${REFERENCE}"
+		(at -0.1 17.78 0)
+		(unlocked yes)
+		(layer "F.Fab")
+		(uuid "79c36b70-660b-43f0-b905-103773c51193")
+		(effects
+			(font
+				(size 1 1)
+				(thickness 0.15)
+			)
+		)
+	)
+	(pad "1" thru_hole roundrect
+		(at -7.62 -10.16)
+		(size 1.7 1.7)
+		(drill 1)
+		(layers "*.Cu" "*.Mask")
+		(remove_unused_layers no)
+		(roundrect_rratio 0.15)
+		(uuid "d1bb63a2-29cd-4970-9056-d8fb47ccbff1")
+	)
+	(pad "2" thru_hole circle
+		(at -7.62 -7.62)
+		(size 1.7 1.7)
+		(drill 1)
+		(layers "*.Cu" "*.Mask")
+		(remove_unused_layers no)
+		(uuid "b56c7c16-6fd5-4d88-b20b-25d30423c421")
+	)
+	(pad "3" thru_hole circle
+		(at -7.62 -5.08)
+		(size 1.7 1.7)
+		(drill 1)
+		(layers "*.Cu" "*.Mask")
+		(remove_unused_layers no)
+		(uuid "636e829c-46bc-4dca-b361-a1ee91c589fb")
+	)
+	(pad "4" thru_hole circle
+		(at -7.62 -2.54)
+		(size 1.7 1.7)
+		(drill 1)
+		(layers "*.Cu" "*.Mask")
+		(remove_unused_layers no)
+		(uuid "26b8db50-5d0d-4027-9f92-22632c380724")
+	)
+	(pad "5" thru_hole circle
+		(at -7.62 0)
+		(size 1.7 1.7)
+		(drill 1)
+		(layers "*.Cu" "*.Mask")
+		(remove_unused_layers no)
+		(uuid "882374e3-caff-4217-a4df-64d3ccf956c3")
+	)
+	(pad "6" thru_hole circle
+		(at -7.62 2.54)
+		(size 1.7 1.7)
+		(drill 1)
+		(layers "*.Cu" "*.Mask")
+		(remove_unused_layers no)
+		(uuid "8a71f3b2-6957-4fbb-a00f-545025ab6e12")
+	)
+	(pad "7" thru_hole circle
+		(at -7.62 5.08)
+		(size 1.7 1.7)
+		(drill 1)
+		(layers "*.Cu" "*.Mask")
+		(remove_unused_layers no)
+		(uuid "ee51e7e7-4d37-466d-8d96-161b42df1896")
+	)
+	(pad "8" thru_hole circle
+		(at -7.62 7.62)
+		(size 1.7 1.7)
+		(drill 1)
+		(layers "*.Cu" "*.Mask")
+		(remove_unused_layers no)
+		(uuid "d5831d60-80d8-4a8c-818a-827e37160a17")
+	)
+	(pad "9" thru_hole circle
+		(at -7.62 10.16)
+		(size 1.7 1.7)
+		(drill 1)
+		(layers "*.Cu" "*.Mask")
+		(remove_unused_layers no)
+		(uuid "76cacfd2-77b3-469f-a48b-dd77ea38b55c")
+	)
+	(pad "10" thru_hole circle
+		(at 7.62 10.16)
+		(size 1.7 1.7)
+		(drill 1)
+		(layers "*.Cu" "*.Mask")
+		(remove_unused_layers no)
+		(uuid "35af9cda-97f6-4d81-b704-42712098b756")
+	)
+	(pad "11" thru_hole circle
+		(at 7.62 7.62)
+		(size 1.7 1.7)
+		(drill 1)
+		(layers "*.Cu" "*.Mask")
+		(remove_unused_layers no)
+		(uuid "e5d0acf7-5cc3-40cc-95ab-c18859836ab1")
+	)
+	(pad "12" thru_hole circle
+		(at 7.62 5.08)
+		(size 1.7 1.7)
+		(drill 1)
+		(layers "*.Cu" "*.Mask")
+		(remove_unused_layers no)
+		(uuid "78aed1d1-b180-4d7e-8ea2-bfeab948cd70")
+	)
+	(pad "13" thru_hole circle
+		(at 7.62 2.54)
+		(size 1.7 1.7)
+		(drill 1)
+		(layers "*.Cu" "*.Mask")
+		(remove_unused_layers no)
+		(uuid "37f89ad5-d51f-4ff1-8de5-e714c1608a67")
+	)
+	(pad "14" thru_hole circle
+		(at 7.62 0)
+		(size 1.7 1.7)
+		(drill 1)
+		(layers "*.Cu" "*.Mask")
+		(remove_unused_layers no)
+		(uuid "bbe9133d-b11c-4951-b00e-3f298b38f4e0")
+	)
+	(pad "15" thru_hole circle
+		(at 7.62 -2.54)
+		(size 1.7 1.7)
+		(drill 1)
+		(layers "*.Cu" "*.Mask")
+		(remove_unused_layers no)
+		(uuid "5eed437a-ec57-4650-8aa9-ae59d3402b98")
+	)
+	(pad "16" thru_hole circle
+		(at 7.62 -5.08)
+		(size 1.7 1.7)
+		(drill 1)
+		(layers "*.Cu" "*.Mask")
+		(remove_unused_layers no)
+		(uuid "48ee4904-1fee-4766-851b-4bd967e910df")
+	)
+	(pad "17" thru_hole circle
+		(at 7.62 -7.62)
+		(size 1.7 1.7)
+		(drill 1)
+		(layers "*.Cu" "*.Mask")
+		(remove_unused_layers no)
+		(uuid "dd16cc99-5358-40c5-bf07-dd968253b967")
+	)
+	(pad "18" thru_hole circle
+		(at 7.62 -10.16)
+		(size 1.7 1.7)
+		(drill 1)
+		(layers "*.Cu" "*.Mask")
+		(remove_unused_layers no)
+		(uuid "86152640-255f-47a3-928c-33fc8834df32")
+	)
+	(zone
+		(layers "F.Cu" "B.Cu")
+		(uuid "b7b5d213-60cd-486f-bfc9-24388b5e256c")
+		(hatch edge 0.5)
+		(connect_pads
+			(clearance 0)
+		)
+		(min_thickness 0.25)
+		(keepout
+			(tracks not_allowed)
+			(vias not_allowed)
+			(pads not_allowed)
+			(copperpour not_allowed)
+			(footprints allowed)
+		)
+		(placement
+			(enabled no)
+			(sheetname "")
+		)
+		(fill
+			(thermal_gap 0.5)
+			(thermal_bridge_width 0.5)
+			(island_removal_mode 0)
+		)
+		(polygon
+			(pts
+				(xy -6.66 5) (xy 6.4 5) (xy 6.4 12.8) (xy -6.66 12.8)
+			)
+		)
+	)
+	(zone
+		(layer "F.CrtYd")
+		(uuid "e2eaa247-ccd4-4b12-87ce-c50b2db9ddc0")
+		(hatch edge 0.5)
+		(connect_pads
+			(clearance 0)
+		)
+		(min_thickness 0.25)
+		(keepout
+			(tracks allowed)
+			(vias allowed)
+			(pads not_allowed)
+			(copperpour allowed)
+			(footprints not_allowed)
+		)
+		(placement
+			(enabled no)
+			(sheetname "")
+		)
+		(fill
+			(thermal_gap 0.5)
+			(thermal_bridge_width 0.5)
+			(island_removal_mode 0)
+		)
+		(polygon
+			(pts
+				(xy -9.5 -11.9) (xy 9.3 -11.9) (xy 9.3 11.9) (xy -9.5 11.9)
+			)
+		)
+	)
+	(embedded_fonts no)
+)
diff --git a/hardware/boards/main-control-board/libraries/symbols/tiny_engineer_modules.kicad_sym b/hardware/boards/main-control-board/libraries/symbols/tiny_engineer_modules.kicad_sym
new file mode 100644
index 0000000..563f45b
--- /dev/null
+++ b/hardware/boards/main-control-board/libraries/symbols/tiny_engineer_modules.kicad_sym
@@ -0,0 +1,793 @@
+(kicad_symbol_lib
+	(version 20251024)
+	(generator "kicad_symbol_editor")
+	(generator_version "10.0")
+	(symbol "Adafruit_PCA9685_Module"
+		(exclude_from_sim no)
+		(in_bom yes)
+		(on_board yes)
+		(in_pos_files yes)
+		(duplicate_pin_numbers_are_jumpers no)
+		(property "Reference" "U"
+			(at 5.334 9.144 0)
+			(show_name no)
+			(do_not_autoplace no)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(property "Value" "Adafruit PCA9685"
+			(at -1.778 0 0)
+			(show_name no)
+			(do_not_autoplace no)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(property "Footprint" ""
+			(at 0 0 0)
+			(show_name no)
+			(do_not_autoplace no)
+			(hide yes)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(property "Datasheet" ""
+			(at 0 0 0)
+			(show_name no)
+			(do_not_autoplace no)
+			(hide yes)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(property "Description" ""
+			(at 0 0 0)
+			(show_name no)
+			(do_not_autoplace no)
+			(hide yes)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(symbol "Adafruit_PCA9685_Module_1_1"
+			(rectangle
+				(start -12.7 7.62)
+				(end 12.7 -7.62)
+				(stroke
+					(width 0)
+					(type solid)
+				)
+				(fill
+					(type background)
+				)
+			)
+			(pin power_in line
+				(at 0 -10.16 90)
+				(length 2.54)
+				(name "GND"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "1"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin input line
+				(at 15.24 3.81 180)
+				(length 2.54)
+				(name "OE"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "2"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin input line
+				(at 15.24 1.27 180)
+				(length 2.54)
+				(name "SCL"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "3"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin bidirectional line
+				(at 15.24 -1.27 180)
+				(length 2.54)
+				(name "SDA"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "4"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin power_in line
+				(at 15.24 -3.81 180)
+				(length 2.54)
+				(name "VCC"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "5"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin power_in line
+				(at 0 10.16 270)
+				(length 2.54)
+				(name "V+"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "6"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+		)
+		(embedded_fonts no)
+	)
+	(symbol "ESP32_C3_Zero_Dev_Board"
+		(exclude_from_sim no)
+		(in_bom yes)
+		(on_board yes)
+		(in_pos_files yes)
+		(duplicate_pin_numbers_are_jumpers no)
+		(property "Reference" "U"
+			(at -0.254 2.286 0)
+			(show_name no)
+			(do_not_autoplace no)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(property "Value" "ESP32-C3-ZERO"
+			(at 0.254 -1.016 0)
+			(show_name no)
+			(do_not_autoplace no)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(property "Footprint" ""
+			(at 0 0 0)
+			(show_name no)
+			(do_not_autoplace no)
+			(hide yes)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(property "Datasheet" "https://www.waveshare.com/wiki/ESP32-C3-Zero"
+			(at 30.734 -19.304 0)
+			(show_name no)
+			(do_not_autoplace no)
+			(hide yes)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(property "Description" "Waveshare ESP32-C3-Zero module header, pads numbered anticlockwise from USB"
+			(at 46.736 -16.002 0)
+			(show_name no)
+			(do_not_autoplace no)
+			(hide yes)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(symbol "ESP32_C3_Zero_Dev_Board_1_1"
+			(rectangle
+				(start -15.24 11.43)
+				(end 15.24 -11.43)
+				(stroke
+					(width 0)
+					(type solid)
+				)
+				(fill
+					(type background)
+				)
+			)
+			(pin power_in line
+				(at 0 13.97 270)
+				(length 2.54)
+				(name "5V"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "1"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin power_in line
+				(at 0 -13.97 90)
+				(length 2.54)
+				(name "GND"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "2"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin power_out line
+				(at -17.78 10.16 0)
+				(length 2.54)
+				(name "3V3"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "3"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin bidirectional line
+				(at -17.78 2.54 0)
+				(length 2.54)
+				(name "GP0"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "4"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin bidirectional line
+				(at -17.78 0 0)
+				(length 2.54)
+				(name "GP1"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "5"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin bidirectional line
+				(at -17.78 -2.54 0)
+				(length 2.54)
+				(name "GP2"
+					(effects
+						(font
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+						)
+					)
+				)
+				(number "6"
+					(effects
+						(font
+							(size 1.27 1.27)
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+			)
+			(pin bidirectional line
+				(at -17.78 -5.08 0)
+				(length 2.54)
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+					(effects
+						(font
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+						)
+					)
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+				(number "7"
+					(effects
+						(font
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+						)
+					)
+				)
+			)
+			(pin bidirectional line
+				(at -17.78 -7.62 0)
+				(length 2.54)
+				(name "GP4"
+					(effects
+						(font
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+					)
+				)
+				(number "8"
+					(effects
+						(font
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+				(at -17.78 -10.16 0)
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+					(effects
+						(font
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+				(at 17.78 -10.16 180)
+				(length 2.54)
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+				(at 17.78 -7.62 180)
+				(length 2.54)
+				(name "GP7"
+					(effects
+						(font
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+					)
+				)
+				(number "11"
+					(effects
+						(font
+							(size 1.27 1.27)
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+			(pin bidirectional line
+				(at 17.78 -5.08 180)
+				(length 2.54)
+				(name "GP8"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "12"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin bidirectional line
+				(at 17.78 -2.54 180)
+				(length 2.54)
+				(name "GP9"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "13"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin bidirectional line
+				(at 17.78 0 180)
+				(length 2.54)
+				(name "GP10"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "14"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin bidirectional line
+				(at 17.78 2.54 180)
+				(length 2.54)
+				(name "USB_DM"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "15"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin bidirectional line
+				(at 17.78 5.08 180)
+				(length 2.54)
+				(name "USB_DP"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "16"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin bidirectional line
+				(at 17.78 7.62 180)
+				(length 2.54)
+				(name "RX"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "17"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin bidirectional line
+				(at 17.78 10.16 180)
+				(length 2.54)
+				(name "TX"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "18"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+		)
+		(embedded_fonts no)
+	)
+	(symbol "MAX98357_Module"
+		(exclude_from_sim no)
+		(in_bom yes)
+		(on_board yes)
+		(in_pos_files yes)
+		(duplicate_pin_numbers_are_jumpers no)
+		(property "Reference" "U"
+			(at 12.446 -4.572 0)
+			(show_name no)
+			(do_not_autoplace no)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(property "Value" "MAX98357A"
+			(at 0 0 0)
+			(show_name no)
+			(do_not_autoplace no)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(property "Footprint" ""
+			(at 0 0 0)
+			(show_name no)
+			(do_not_autoplace no)
+			(hide yes)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(property "Datasheet" ""
+			(at 0 0 0)
+			(show_name no)
+			(do_not_autoplace no)
+			(hide yes)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(property "Description" ""
+			(at 0 0 0)
+			(show_name no)
+			(do_not_autoplace no)
+			(hide yes)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(symbol "MAX98357_Module_1_1"
+			(rectangle
+				(start -11.4299 6.35)
+				(end 11.43 -6.35)
+				(stroke
+					(width 0)
+					(type solid)
+				)
+				(fill
+					(type background)
+				)
+			)
+			(text "MAX98357"
+				(at 6.858 7.366 0)
+				(effects
+					(font
+						(size 1.27 1.27)
+					)
+				)
+			)
+			(pin input line
+				(at -13.97 5.08 0)
+				(length 2.54)
+				(name "LRC"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "1"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin input line
+				(at -13.97 2.54 0)
+				(length 2.54)
+				(name "BCLK"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "2"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin input line
+				(at -13.97 0 0)
+				(length 2.54)
+				(name "DIN"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "3"
+					(effects
+						(font
+							(size 1.27 1.27)
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+					)
+				)
+			)
+			(pin input line
+				(at -13.97 -2.54 0)
+				(length 2.54)
+				(name "GAIN"
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+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "4"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin input line
+				(at -13.97 -5.08 0)
+				(length 2.54)
+				(name "SD"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "5"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin power_in line
+				(at 0 -8.89 90)
+				(length 2.54)
+				(name "GND"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "6"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+			)
+			(pin power_in line
+				(at 0 8.89 270)
+				(length 2.54)
+				(name "Vin"
+					(effects
+						(font
+							(size 1.27 1.27)
+						)
+					)
+				)
+				(number "7"
+					(effects
+						(font
+							(size 1.27 1.27)
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+					)
+				)
+			)
+		)
+		(embedded_fonts no)
+	)
+)
diff --git a/hardware/boards/main-control-board/main-control-board.kicad_dru b/hardware/boards/main-control-board/main-control-board.kicad_dru
new file mode 100644
index 0000000..02bad03
--- /dev/null
+++ b/hardware/boards/main-control-board/main-control-board.kicad_dru
@@ -0,0 +1,14 @@
+(version 1)
+
+(rule "5V min width"
+  (constraint track_width (min 1.5mm))
+  (condition "A.NetClass == 'Power5V'"))
+
+(rule "5V via min"
+  (constraint via_diameter (min 0.8mm))
+  (constraint hole_size (min 0.4mm))
+  (condition "A.NetClass == 'Power5V' && A.Type == 'Via'"))
+
+(rule "3V3 min width"
+  (constraint track_width (min 0.4mm))
+  (condition "A.NetClass == 'Power3V3'"))
\ No newline at end of file
diff --git a/hardware/boards/main-control-board/main-control-board.kicad_pcb b/hardware/boards/main-control-board/main-control-board.kicad_pcb
new file mode 100644
index 0000000..52f918f
--- /dev/null
+++ b/hardware/boards/main-control-board/main-control-board.kicad_pcb
@@ -0,0 +1,5591 @@
+(kicad_pcb
+	(version 20260206)
+	(generator "pcbnew")
+	(generator_version "10.0")
+	(general
+		(thickness 1.6002)
+		(legacy_teardrops no)
+	)
+	(paper "A4")
+	(title_block
+		(comment 4 "AISLER Project ID: OVMDYZJE")
+	)
+	(layers
+		(0 "F.Cu" signal "Front")
+		(2 "B.Cu" signal "Back")
+		(13 "F.Paste" user)
+		(15 "B.Paste" user)
+		(5 "F.SilkS" user "F.Silkscreen")
+		(7 "B.SilkS" user "B.Silkscreen")
+		(1 "F.Mask" user)
+		(3 "B.Mask" user)
+		(25 "Edge.Cuts" user)
+		(27 "Margin" user)
+		(31 "F.CrtYd" user "F.Courtyard")
+		(29 "B.CrtYd" user "B.Courtyard")
+		(35 "F.Fab" user)
+		(33 "B.Fab" user)
+	)
+	(setup
+		(stackup
+			(layer "F.SilkS"
+				(type "Top Silk Screen")
+			)
+			(layer "F.Paste"
+				(type "Top Solder Paste")
+			)
+			(layer "F.Mask"
+				(type "Top Solder Mask")
+				(thickness 0.01)
+			)
+			(layer "F.Cu"
+				(type "copper")
+				(thickness 0.035)
+			)
+			(layer "dielectric 1"
+				(type "core")
+				(thickness 1.5102)
+				(material "FR4")
+				(epsilon_r 4.5)
+				(loss_tangent 0.02)
+			)
+			(layer "B.Cu"
+				(type "copper")
+				(thickness 0.035)
+			)
+			(layer "B.Mask"
+				(type "Bottom Solder Mask")
+				(thickness 0.01)
+			)
+			(layer "B.Paste"
+				(type "Bottom Solder Paste")
+			)
+			(layer "B.SilkS"
+				(type "Bottom Silk Screen")
+			)
+			(copper_finish "None")
+			(dielectric_constraints no)
+		)
+		(pad_to_mask_clearance 0)
+		(allow_soldermask_bridges_in_footprints no)
+		(tenting
+			(front yes)
+			(back yes)
+		)
+		(covering
+			(front no)
+			(back no)
+		)
+		(plugging
+			(front no)
+			(back no)
+		)
+		(capping no)
+		(filling no)
+		(pcbplotparams
+			(layerselection 0x00000000_00000000_55555555_5755f5ff)
+			(plot_on_all_layers_selection 0x00000000_00000000_00000000_00000000)
+			(disableapertmacros no)
+			(usegerberextensions no)
+			(usegerberattributes yes)
+			(usegerberadvancedattributes yes)
+			(creategerberjobfile yes)
+			(dashed_line_dash_ratio 12)
+			(dashed_line_gap_ratio 3)
+			(svgprecision 4)
+			(plotframeref no)
+			(mode 1)
+			(useauxorigin no)
+			(pdf_front_fp_property_popups yes)
+			(pdf_back_fp_property_popups yes)
+			(pdf_metadata yes)
+			(pdf_single_document no)
+			(dxfpolygonmode yes)
+			(dxfimperialunits yes)
+			(dxfusepcbnewfont yes)
+			(psnegative no)
+			(psa4output no)
+			(plot_black_and_white yes)
+			(sketchpadsonfab no)
+			(plotpadnumbers no)
+			(hidednponfab no)
+			(sketchdnponfab yes)
+			(crossoutdnponfab yes)
+			(subtractmaskfromsilk no)
+			(outputformat 1)
+			(mirror no)
+			(drillshape 1)
+			(scaleselection 1)
+			(outputdirectory "")
+		)
+	)
+	(footprint "Connector_PinHeader_2.54mm:PinHeader_1x04_P2.54mm_Vertical"
+		(layer "F.Cu")
+		(uuid "001a3c8d-f56e-416a-9d49-d743ccb82b6a")
+		(at 218.08 47.85 180)
+		(descr "Through hole straight pin header, 1x04, 2.54mm pitch, single row")
+		(tags "Through hole pin header THT 1x04 2.54mm single row")
+		(property "Reference" "J2"
+			(at 0 -2.38 0)
+			(layer "F.SilkS")
+			(hide yes)
+			(uuid "973033a8-235c-4864-8a9c-0c65e6c3772b")
+			(effects
+				(font
+					(size 1 1)
+					(thickness 0.15)
+				)
+			)
+		)
+		(property "Value" "Conn_OLED"
+			(at 0 10 0)
+			(layer "F.Fab")
+			(uuid "340a24d9-d8a4-439c-ac91-5b821615650d")
+			(effects
+				(font
+					(size 1 1)
+					(thickness 0.15)
+				)
+			)
+		)
+		(property "Datasheet" ""
+			(at 0 0 0)
+			(layer "F.Fab")
+			(hide yes)
+			(uuid "5e8afc9f-ff1c-4df0-a17d-2074a5a0f79f")
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(property "Description" "Generic connector, single row, 01x04, script generated"
+			(at 0 0 0)
+			(layer "F.Fab")
+			(hide yes)
+			(uuid "ba9719dc-fb79-4faf-a2e7-08f9d1b5c678")
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(property "LCSC Part #" "C2691448"
+			(at 0 0 180)
+			(unlocked yes)
+			(layer "F.Fab")
+			(hide yes)
+			(uuid "039cf1c0-3bd2-4d9c-94d8-f0a634869702")
+			(effects
+				(font
+					(size 1 1)
+					(thickness 0.15)
+				)
+			)
+		)
+		(property "FT Rotation Offset" "90"
+			(at 0 0 180)
+			(unlocked yes)
+			(layer "F.Fab")
+			(hide yes)
+			(uuid "f7132b6e-5c0e-492c-8aa1-0fd0a3036707")
+			(effects
+				(font
+					(size 1 1)
+					(thickness 0.15)
+				)
+			)
+		)
+		(property ki_fp_filters "Connector*:*_1x??_*")
+		(path "/34bba5f8-ff75-4293-a0eb-59d1777af0de")
+		(sheetname "/")
+		(sheetfile "main-control-board.kicad_sch")
+		(units
+			(unit
+				(name "A")
+				(pins "1" "2" "3" "4")
+			)
+		)
+		(attr through_hole)
+		(duplicate_pad_numbers_are_jumpers no)
+		(fp_line
+			(start 1.38 1.27)
+			(end 1.38 9)
+			(stroke
+				(width 0.12)
+				(type solid)
+			)
+			(layer "F.SilkS")
+			(uuid "9162021d-ca47-444c-bc30-bf2c94597ef3")
+		)
+		(fp_line
+			(start -1.38 9)
+			(end 1.38 9)
+			(stroke
+				(width 0.12)
+				(type solid)
+			)
+			(layer "F.SilkS")
+			(uuid "e0c1abe3-d4bf-4a6a-97ea-6dde2a662c51")
+		)
+		(fp_line
+			(start -1.38 1.27)
+			(end 1.38 1.27)
+			(stroke
+				(width 0.12)
+				(type solid)
+			)
+			(layer "F.SilkS")
+			(uuid "93c65a32-04d6-42a8-a57a-ec10fad908b0")
+		)
+		(fp_line
+			(start -1.38 1.27)
+			(end -1.38 9)
+			(stroke
+				(width 0.12)
+				(type solid)
+			)
+			(layer "F.SilkS")
+			(uuid "cfdb9b42-56b9-4d95-a22b-398639aa9d46")
+		)
+		(fp_line
+			(start -1.38 0)
+			(end -1.38 -1.38)
+			(stroke
+				(width 0.12)
+				(type solid)
+			)
+			(layer "F.SilkS")
+			(uuid "a47a64bc-31bd-4398-9284-f16829ac0a54")
+		)
+		(fp_line
+			(start -1.38 -1.38)
+			(end 0 -1.38)
+			(stroke
+				(width 0.12)
+				(type solid)
+			)
+			(layer "F.SilkS")
+			(uuid "e463c24b-7a02-4f07-9ac5-3c06a88cb00f")
+		)
+		(fp_rect
+			(start -1.77 -1.77)
+			(end 1.77 9.39)
+			(stroke
+				(width 0.05)
+				(type solid)
+			)
+			(fill no)
+			(layer "F.CrtYd")
+			(uuid "7486dd91-9946-41fa-a65a-37ce8db567c4")
+		)
+		(fp_line
+			(start 1.27 8.89)
+			(end -1.27 8.89)
+			(stroke
+				(width 0.1)
+				(type solid)
+			)
+			(layer "F.Fab")
+			(uuid "601ff06a-e73a-49be-b68e-2a3d6f453beb")
+		)
+		(fp_line
+			(start 1.27 -1.27)
+			(end 1.27 8.89)
+			(stroke
+				(width 0.1)
+				(type solid)
+			)
+			(layer "F.Fab")
+			(uuid "b85e559a-535c-497a-95fd-260402c72694")
+		)
+		(fp_line
+			(start -0.635 -1.27)
+			(end 1.27 -1.27)
+			(stroke
+				(width 0.1)
+				(type solid)
+			)
+			(layer "F.Fab")
+			(uuid "39371f0c-1f8e-4120-b251-40ed1ee59e1f")
+		)
+		(fp_line
+			(start -1.27 8.89)
+			(end -1.27 -0.635)
+			(stroke
+				(width 0.1)
+				(type solid)
+			)
+			(layer "F.Fab")
+			(uuid "28ad1f3d-eabd-4fd2-93b7-6b61b7d22162")
+		)
+		(fp_line
+			(start -1.27 -0.635)
+			(end -0.635 -1.27)
+			(stroke
+				(width 0.1)
+				(type solid)
+			)
+			(layer "F.Fab")
+			(uuid "97a4a2c5-ddb6-44b4-a01f-0227130a93c7")
+		)
+		(fp_text user "${REFERENCE}"
+			(at 0 3.81 90)
+			(layer "F.Fab")
+			(uuid "22d49b3a-ef02-4c80-996c-a0fdad222ad1")
+			(effects
+				(font
+					(size 1 1)
+					(thickness 0.15)
+				)
+			)
+		)
+		(pad "1" thru_hole rect
+			(at 0 0 180)
+			(size 1.7 1.7)
+			(drill 1)
+			(layers "*.Cu" "*.Mask")
+			(remove_unused_layers no)
+			(net "+3.3V")
+			(pinfunction "Pin_1_1")
+			(pintype "passive")
+			(uuid "ebc51c89-6e46-468a-a7a4-290f42ca9ac5")
+		)
+		(pad "2" thru_hole circle
+			(at 0 2.54 180)
+			(size 1.7 1.7)
+			(drill 1)
+			(layers "*.Cu" "*.Mask")
+			(remove_unused_layers no)
+			(net "GND")
+			(pinfunction "Pin_2_2")
+			(pintype "passive")
+			(uuid "edd00747-9467-4f0f-b8e9-8014043c21ff")
+		)
+		(pad "3" thru_hole circle
+			(at 0 5.08 180)
+			(size 1.7 1.7)
+			(drill 1)
+			(layers "*.Cu" "*.Mask")
+			(remove_unused_layers no)
+			(net "/I2C_SDA")
+			(pinfunction "Pin_3_3")
+			(pintype "passive")
+			(uuid "b40b346e-1ab5-4d11-8dba-608fec26e4df")
+		)
+		(pad "4" thru_hole circle
+			(at 0 7.62 180)
+			(size 1.7 1.7)
+			(drill 1)
+			(layers "*.Cu" "*.Mask")
+			(remove_unused_layers no)
+			(net "/I2C_SCL")
+			(pinfunction "Pin_4_4")
+			(pintype "passive")
+			(uuid "e986ac8c-7842-450c-aedf-4dbe708b6584")
+		)
+		(embedded_fonts no)
+		(model "${KICAD10_3DMODEL_DIR}/Connector_PinHeader_2.54mm.3dshapes/PinHeader_1x04_P2.54mm_Vertical.step"
+			(offset
+				(xyz 0 0 0)
+			)
+			(scale
+				(xyz 1 1 1)
+			)
+			(rotate
+				(xyz 0 0 0)
+			)
+		)
+	)
+	(footprint "Connector_PinSocket_2.54mm:PinSocket_1x07_P2.54mm_Vertical"
+		(layer "F.Cu")
+		(uuid "2320fb60-ce94-4ffd-adc3-b3a85a3374d3")
+		(at 241 50 180)
+		(descr "Through hole straight socket strip, 1x07, 2.54mm pitch, single row (from Kicad 4.0.7), script generated")
+		(tags "Through hole socket strip THT 1x07 2.54mm single row")
+		(property "Reference" "J1"
+			(at 0 -2.77 0)
+			(layer "F.SilkS")
+			(hide yes)
+			(uuid "6bbd6294-4a1b-4031-9f59-08d7b5f535c9")
+			(effects
+				(font
+					(size 1 1)
+					(thickness 0.15)
+				)
+			)
+		)
+		(property "Value" "Conn_MAX98357"
+			(at 0 18.01 0)
+			(layer "F.Fab")
+			(uuid "26e1e6a6-087b-4027-a866-9c53cbd8ee23")
+			(effects
+				(font
+					(size 1 1)
+					(thickness 0.15)
+				)
+			)
+		)
+		(property "Datasheet" ""
+			(at 0 0 0)
+			(layer "F.Fab")
+			(hide yes)
+			(uuid "4e91cb9f-e718-4182-81a2-68bfd8ff35f1")
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(property "Description" "Generic connector, single row, 01x07, script generated"
+			(at 0 0 0)
+			(layer "F.Fab")
+			(hide yes)
+			(uuid "2ea50dfc-7252-4af9-8661-62332716c4e7")
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(property "LCSC Part #" "C2832270"
+			(at 0 0 180)
+			(unlocked yes)
+			(layer "F.Fab")
+			(hide yes)
+			(uuid "be471770-e17d-4c95-851b-c4080934b2a8")
+			(effects
+				(font
+					(size 1 1)
+					(thickness 0.15)
+				)
+			)
+		)
+		(property "FT Rotation Offset" "90"
+			(at 0 0 180)
+			(unlocked yes)
+			(layer "F.Fab")
+			(hide yes)
+			(uuid "9564bd1a-1a8d-4284-91fe-3680047aabd1")
+			(effects
+				(font
+					(size 1 1)
+					(thickness 0.15)
+				)
+			)
+		)
+		(property ki_fp_filters "Connector*:*_1x??_*")
+		(path "/be974232-5f49-406d-83ce-76714e93150c")
+		(sheetname "/")
+		(sheetfile "main-control-board.kicad_sch")
+		(units
+			(unit
+				(name "A")
+				(pins "1" "2" "3" "4" "5" "6" "7")
+			)
+		)
+		(attr through_hole)
+		(duplicate_pad_numbers_are_jumpers no)
+		(fp_line
+			(start 1.33 1.27)
+			(end 1.33 16.57)
+			(stroke
+				(width 0.12)
+				(type solid)
+			)
+			(layer "F.SilkS")
+			(uuid "0a163a0b-752f-4647-8b3f-3a5bb28488b2")
+		)
+		(fp_line
+			(start 1.33 -1.33)
+			(end 1.33 0)
+			(stroke
+				(width 0.12)
+				(type solid)
+			)
+			(layer "F.SilkS")
+			(uuid "8816d73f-61fd-4cd9-abb7-69e173c5c65c")
+		)
+		(fp_line
+			(start 0 -1.33)
+			(end 1.33 -1.33)
+			(stroke
+				(width 0.12)
+				(type solid)
+			)
+			(layer "F.SilkS")
+			(uuid "c73db5e5-175b-4655-a4ed-d0beff81c734")
+		)
+		(fp_line
+			(start -1.33 16.57)
+			(end 1.33 16.57)
+			(stroke
+				(width 0.12)
+				(type solid)
+			)
+			(layer "F.SilkS")
+			(uuid "936e3930-c08d-4d7a-9b67-c2fca457c746")
+		)
+		(fp_line
+			(start -1.33 1.27)
+			(end 1.33 1.27)
+			(stroke
+				(width 0.12)
+				(type solid)
+			)
+			(layer "F.SilkS")
+			(uuid "748fcf11-e4bb-4b24-b83d-05214bc58aeb")
+		)
+		(fp_line
+			(start -1.33 1.27)
+			(end -1.33 16.57)
+			(stroke
+				(width 0.12)
+				(type solid)
+			)
+			(layer "F.SilkS")
+			(uuid "05879eb4-edd8-4c5f-b84b-4976bdbb7ab9")
+		)
+		(fp_line
+			(start 1.77 17.01)
+			(end -1.77 17.01)
+			(stroke
+				(width 0.05)
+				(type solid)
+			)
+			(layer "F.CrtYd")
+			(uuid "a66eb7ef-3c2c-4370-a259-c42f0a7b7585")
+		)
+		(fp_line
+			(start 1.77 -1.77)
+			(end 1.77 17.01)
+			(stroke
+				(width 0.05)
+				(type solid)
+			)
+			(layer "F.CrtYd")
+			(uuid "8468a492-701f-4e15-8b1f-7f3f5e1157a0")
+		)
+		(fp_line
+			(start -1.77 17.01)
+			(end -1.77 -1.77)
+			(stroke
+				(width 0.05)
+				(type solid)
+			)
+			(layer "F.CrtYd")
+			(uuid "6213c662-5129-46d9-a13f-24839280d93a")
+		)
+		(fp_line
+			(start -1.77 -1.77)
+			(end 1.77 -1.77)
+			(stroke
+				(width 0.05)
+				(type solid)
+			)
+			(layer "F.CrtYd")
+			(uuid "4987a1b8-d085-4015-98fa-c48db8c9f0a4")
+		)
+		(fp_line
+			(start 1.27 16.51)
+			(end -1.27 16.51)
+			(stroke
+				(width 0.1)
+				(type solid)
+			)
+			(layer "F.Fab")
+			(uuid "326df301-e459-45f5-b012-3c3c03c2cad2")
+		)
+		(fp_line
+			(start 1.27 -0.635)
+			(end 1.27 16.51)
+			(stroke
+				(width 0.1)
+				(type solid)
+			)
+			(layer "F.Fab")
+			(uuid "5032b7f9-ba0b-48b5-9429-ad49bdbf724a")
+		)
+		(fp_line
+			(start 0.635 -1.27)
+			(end 1.27 -0.635)
+			(stroke
+				(width 0.1)
+				(type solid)
+			)
+			(layer "F.Fab")
+			(uuid "43ded06b-3a70-4ae5-8d98-7c1a82ac8cfc")
+		)
+		(fp_line
+			(start -1.27 16.51)
+			(end -1.27 -1.27)
+			(stroke
+				(width 0.1)
+				(type solid)
+			)
+			(layer "F.Fab")
+			(uuid "c1f3470d-99c0-4b56-bc8c-56618eff64a4")
+		)
+		(fp_line
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+			(net "/I2C_SDA")
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+			(layers "*.Cu" "*.Mask")
+			(remove_unused_layers no)
+			(net "/I2C_SCL")
+			(pinfunction "Pin_5_5")
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+			(uuid "782971df-d4b9-43e3-af10-417338b4854d")
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+		(pad "6" thru_hole circle
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+			(size 1.7 1.7)
+			(drill 1)
+			(layers "*.Cu" "*.Mask")
+			(remove_unused_layers no)
+			(net "/I2S_BCLK")
+			(pinfunction "Pin_6_6")
+			(pintype "passive")
+			(uuid "fe28323e-20cf-42ca-861c-969b10de2f6b")
+		)
+		(pad "7" thru_hole circle
+			(at 0 -15.24)
+			(size 1.7 1.7)
+			(drill 1)
+			(layers "*.Cu" "*.Mask")
+			(remove_unused_layers no)
+			(net "/I2S_LRC")
+			(pinfunction "Pin_7_7")
+			(pintype "passive")
+			(uuid "31f44706-4be4-42c8-92be-3198736b0caa")
+		)
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+			(size 1.7 1.7)
+			(drill 1)
+			(layers "*.Cu" "*.Mask")
+			(remove_unused_layers no)
+			(net "/I2S_DIN")
+			(pinfunction "Pin_8_8")
+			(pintype "passive")
+			(uuid "456664fb-c776-48a7-be20-ec9a6e4b8315")
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+			(layers "*.Cu" "*.Mask")
+			(remove_unused_layers no)
+			(net "Net-(J3-Pin_5)")
+			(pinfunction "Pin_9_9")
+			(pintype "passive")
+			(uuid "33b12cf0-d595-4521-90fc-fdffb6fa684c")
+		)
+		(embedded_fonts no)
+		(model "${KICAD10_3DMODEL_DIR}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_1x09_P2.54mm_Vertical.step"
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+	(footprint "Connector_PinSocket_2.54mm:PinSocket_1x09_P2.54mm_Vertical"
+		(layer "B.Cu")
+		(uuid "f2f5e2be-bc17-434f-a69a-85fb81988b96")
+		(at 143.63 35.9 180)
+		(descr "Through hole straight socket strip, 1x09, 2.54mm pitch, single row (from Kicad 4.0.7), script generated")
+		(tags "Through hole socket strip THT 1x09 2.54mm single row")
+		(property "Reference" "J5"
+			(at 0 2.77 0)
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+		(property ki_fp_filters "Connector*:*_1x??_*")
+		(path "/64059419-3b95-457f-a763-0868cd366632")
+		(sheetname "/")
+		(sheetfile "main-control-board.kicad_sch")
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+				(pins "1" "2" "3" "4" "5" "6" "7" "8" "9")
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+		(fp_text user "${REFERENCE}"
+			(at 0 -10.16 90)
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+			(remove_unused_layers no)
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+			(uuid "0e1b1f0e-da85-4a9a-b7e1-4d9df34a8c0d")
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+			(size 1.7 1.7)
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+			(layers "*.Cu" "*.Mask")
+			(remove_unused_layers no)
+			(net "Net-(J5-Pin_3)")
+			(pinfunction "Pin_3_3")
+			(pintype "passive")
+			(uuid "39a77123-70d8-438b-9a8e-3fb4121bea19")
+		)
+		(pad "4" thru_hole circle
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+			(size 1.7 1.7)
+			(drill 1)
+			(layers "*.Cu" "*.Mask")
+			(remove_unused_layers no)
+			(net "Net-(J5-Pin_4)")
+			(pinfunction "Pin_4_4")
+			(pintype "passive")
+			(uuid "11aa9b7e-d35f-4715-83bb-c0f24d8b3766")
+		)
+		(pad "5" thru_hole circle
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+			(size 1.7 1.7)
+			(drill 1)
+			(layers "*.Cu" "*.Mask")
+			(remove_unused_layers no)
+			(net "Net-(J5-Pin_5)")
+			(pinfunction "Pin_5_5")
+			(pintype "passive")
+			(uuid "5f8a8caf-6dfb-4e0c-ae2b-896c20cbf4e6")
+		)
+		(pad "6" thru_hole circle
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+			(size 1.7 1.7)
+			(drill 1)
+			(layers "*.Cu" "*.Mask")
+			(remove_unused_layers no)
+			(net "/USB_D-")
+			(pinfunction "Pin_6_6")
+			(pintype "passive")
+			(uuid "4a0b1570-d575-499a-a774-3e066f5e6560")
+		)
+		(pad "7" thru_hole circle
+			(at 0 -15.24 180)
+			(size 1.7 1.7)
+			(drill 1)
+			(layers "*.Cu" "*.Mask")
+			(remove_unused_layers no)
+			(net "/USB_D+")
+			(pinfunction "Pin_7_7")
+			(pintype "passive")
+			(uuid "57edce98-d972-4e30-86be-9452aa9dbc4d")
+		)
+		(pad "8" thru_hole circle
+			(at 0 -17.78 180)
+			(size 1.7 1.7)
+			(drill 1)
+			(layers "*.Cu" "*.Mask")
+			(remove_unused_layers no)
+			(net "Net-(J5-Pin_8)")
+			(pinfunction "Pin_8_8")
+			(pintype "passive")
+			(uuid "11f4d447-2c30-4371-81c4-8f2c1ef23f00")
+		)
+		(pad "9" thru_hole circle
+			(at 0 -20.32 180)
+			(size 1.7 1.7)
+			(drill 1)
+			(layers "*.Cu" "*.Mask")
+			(remove_unused_layers no)
+			(net "Net-(J5-Pin_9)")
+			(pinfunction "Pin_9_9")
+			(pintype "passive")
+			(uuid "32d980d7-1129-4bc6-a3a9-99618d32f22a")
+		)
+		(embedded_fonts no)
+		(model "${KICAD10_3DMODEL_DIR}/Connector_PinSocket_2.54mm.3dshapes/PinSocket_1x09_P2.54mm_Vertical.step"
+			(offset
+				(xyz 0 0 0)
+			)
+			(scale
+				(xyz 1 1 1)
+			)
+			(rotate
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+			)
+		)
+	)
+	(gr_rect
+		(start 151.49 33.01)
+		(end 213.99 58.41)
+		(stroke
+			(width 0.1)
+			(type default)
+		)
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+			"a3e07924-64cf-4259-9231-0855b76b3901"
+		)
+	)
+	(embedded_fonts no)
+)
diff --git a/hardware/boards/main-control-board/main-control-board.kicad_pro b/hardware/boards/main-control-board/main-control-board.kicad_pro
new file mode 100644
index 0000000..a8f9f35
--- /dev/null
+++ b/hardware/boards/main-control-board/main-control-board.kicad_pro
@@ -0,0 +1,802 @@
+{
+  "board": {
+    "3dviewports": [],
+    "design_settings": {
+      "defaults": {
+        "apply_defaults_to_fp_barcodes": false,
+        "apply_defaults_to_fp_dimensions": false,
+        "apply_defaults_to_fp_fields": false,
+        "apply_defaults_to_fp_shapes": false,
+        "apply_defaults_to_fp_text": false,
+        "board_outline_line_width": 0.05,
+        "copper_line_width": 0.2,
+        "copper_text_italic": false,
+        "copper_text_size_h": 1.5,
+        "copper_text_size_v": 1.5,
+        "copper_text_thickness": 0.3,
+        "copper_text_upright": false,
+        "courtyard_line_width": 0.05,
+        "dimension_precision": 4,
+        "dimension_units": 3,
+        "dimensions": {
+          "arrow_length": 1270000,
+          "extension_offset": 500000,
+          "keep_text_aligned": true,
+          "suppress_zeroes": true,
+          "text_position": 0,
+          "units_format": 0
+        },
+        "fab_line_width": 0.1,
+        "fab_text_italic": false,
+        "fab_text_size_h": 1.0,
+        "fab_text_size_v": 1.0,
+        "fab_text_thickness": 0.15,
+        "fab_text_upright": false,
+        "other_line_width": 0.1,
+        "other_text_italic": false,
+        "other_text_size_h": 1.0,
+        "other_text_size_v": 1.0,
+        "other_text_thickness": 0.15,
+        "other_text_upright": false,
+        "pads": {
+          "drill": 0.8,
+          "height": 1.27,
+          "width": 1.27
+        },
+        "silk_line_width": 0.1,
+        "silk_text_italic": false,
+        "silk_text_size_h": 1.0,
+        "silk_text_size_v": 1.0,
+        "silk_text_thickness": 0.1,
+        "silk_text_upright": false,
+        "zones": {
+          "border_display_style": 2,
+          "border_hatch_pitch": 0.5,
+          "corner_radius": 0.0,
+          "corner_smoothing": 0,
+          "fill_mode": 0,
+          "hatch_gap": 1.5,
+          "hatch_orientation": 0.0,
+          "hatch_smoothing_level": 0,
+          "hatch_smoothing_value": 0.1,
+          "hatch_thickness": 1.0,
+          "min_clearance": 0.5,
+          "min_island_area": 10.0,
+          "min_thickness": 0.25,
+          "pad_connection": 1,
+          "remove_islands": 0,
+          "thermal_relief_gap": 0.5,
+          "thermal_relief_spoke_width": 0.5
+        }
+      },
+      "diff_pair_dimensions": [],
+      "drc_exclusions": [],
+      "meta": {
+        "version": 2
+      },
+      "rule_severities": {
+        "annular_width": "error",
+        "clearance": "error",
+        "connection_width": "warning",
+        "copper_edge_clearance": "error",
+        "copper_sliver": "warning",
+        "courtyards_overlap": "error",
+        "creepage": "error",
+        "diff_pair_gap_out_of_range": "error",
+        "diff_pair_uncoupled_length_too_long": "error",
+        "drill_out_of_range": "error",
+        "duplicate_footprints": "warning",
+        "extra_footprint": "warning",
+        "footprint": "error",
+        "footprint_filters_mismatch": "ignore",
+        "footprint_symbol_field_mismatch": "warning",
+        "footprint_symbol_mismatch": "warning",
+        "footprint_type_mismatch": "ignore",
+        "hole_clearance": "error",
+        "hole_to_hole": "warning",
+        "holes_co_located": "warning",
+        "invalid_outline": "error",
+        "isolated_copper": "warning",
+        "item_on_disabled_layer": "error",
+        "items_not_allowed": "error",
+        "length_out_of_range": "error",
+        "lib_footprint_issues": "warning",
+        "lib_footprint_mismatch": "warning",
+        "malformed_courtyard": "error",
+        "microvia_drill_out_of_range": "error",
+        "mirrored_text_on_front_layer": "warning",
+        "missing_courtyard": "ignore",
+        "missing_footprint": "warning",
+        "missing_tuning_profile": "warning",
+        "net_conflict": "warning",
+        "nonmirrored_text_on_back_layer": "warning",
+        "npth_inside_courtyard": "error",
+        "padstack": "warning",
+        "pth_inside_courtyard": "error",
+        "shorting_items": "error",
+        "silk_edge_clearance": "warning",
+        "silk_over_copper": "warning",
+        "silk_overlap": "warning",
+        "skew_out_of_range": "error",
+        "solder_mask_bridge": "error",
+        "starved_thermal": "error",
+        "text_height": "warning",
+        "text_on_edge_cuts": "error",
+        "text_thickness": "warning",
+        "through_hole_pad_without_hole": "error",
+        "too_many_vias": "error",
+        "track_angle": "error",
+        "track_dangling": "warning",
+        "track_not_centered_on_via": "ignore",
+        "track_on_post_machined_layer": "error",
+        "track_segment_length": "error",
+        "track_width": "error",
+        "tracks_crossing": "error",
+        "tuning_profile_track_geometries": "ignore",
+        "unconnected_items": "error",
+        "unresolved_variable": "error",
+        "via_dangling": "warning",
+        "zones_intersect": "error"
+      },
+      "rules": {
+        "max_error": 0.005,
+        "min_clearance": 0.0,
+        "min_connection": 0.0,
+        "min_copper_edge_clearance": 0.5,
+        "min_groove_width": 0.0,
+        "min_hole_clearance": 0.25,
+        "min_hole_to_hole": 0.25,
+        "min_microvia_diameter": 0.2,
+        "min_microvia_drill": 0.1,
+        "min_resolved_spokes": 2,
+        "min_silk_clearance": 0.0,
+        "min_text_height": 0.8,
+        "min_text_thickness": 0.08,
+        "min_through_hole_diameter": 0.3,
+        "min_track_width": 0.2,
+        "min_via_annular_width": 0.1,
+        "min_via_diameter": 0.5,
+        "solder_mask_to_copper_clearance": 0.005,
+        "use_height_for_length_calcs": true
+      },
+      "teardrop_options": [
+        {
+          "td_onpthpad": true,
+          "td_onroundshapesonly": false,
+          "td_onsmdpad": true,
+          "td_ontrackend": false,
+          "td_onvia": true
+        }
+      ],
+      "teardrop_parameters": [
+        {
+          "td_allow_use_two_tracks": true,
+          "td_curve_segcount": 0,
+          "td_height_ratio": 1.0,
+          "td_length_ratio": 0.5,
+          "td_maxheight": 2.0,
+          "td_maxlen": 1.0,
+          "td_on_pad_in_zone": false,
+          "td_target_name": "td_round_shape",
+          "td_width_to_size_filter_ratio": 0.9
+        },
+        {
+          "td_allow_use_two_tracks": true,
+          "td_curve_segcount": 0,
+          "td_height_ratio": 1.0,
+          "td_length_ratio": 0.5,
+          "td_maxheight": 2.0,
+          "td_maxlen": 1.0,
+          "td_on_pad_in_zone": false,
+          "td_target_name": "td_rect_shape",
+          "td_width_to_size_filter_ratio": 0.9
+        },
+        {
+          "td_allow_use_two_tracks": true,
+          "td_curve_segcount": 0,
+          "td_height_ratio": 1.0,
+          "td_length_ratio": 0.5,
+          "td_maxheight": 2.0,
+          "td_maxlen": 1.0,
+          "td_on_pad_in_zone": false,
+          "td_target_name": "td_track_end",
+          "td_width_to_size_filter_ratio": 0.9
+        }
+      ],
+      "track_widths": [
+        0.0,
+        0.2,
+        0.4,
+        1.5,
+        2.0
+      ],
+      "tuning_pattern_settings": {
+        "diff_pair_defaults": {
+          "corner_radius_percentage": 80,
+          "corner_style": 1,
+          "max_amplitude": 1.0,
+          "min_amplitude": 0.2,
+          "single_sided": false,
+          "spacing": 1.0
+        },
+        "diff_pair_skew_defaults": {
+          "corner_radius_percentage": 80,
+          "corner_style": 1,
+          "max_amplitude": 1.0,
+          "min_amplitude": 0.2,
+          "single_sided": false,
+          "spacing": 0.6
+        },
+        "single_track_defaults": {
+          "corner_radius_percentage": 80,
+          "corner_style": 1,
+          "max_amplitude": 1.0,
+          "min_amplitude": 0.2,
+          "single_sided": false,
+          "spacing": 0.6
+        }
+      },
+      "via_dimensions": [
+        {
+          "diameter": 0.0,
+          "drill": 0.0
+        },
+        {
+          "diameter": 0.6,
+          "drill": 0.3
+        },
+        {
+          "diameter": 0.8,
+          "drill": 0.4
+        }
+      ],
+      "zones_allow_external_fillets": false
+    },
+    "ipc2581": {
+      "bom_rev": "",
+      "dist": "",
+      "distpn": "",
+      "internal_id": "",
+      "mfg": "",
+      "mpn": "",
+      "sch_revision": "v1"
+    },
+    "layer_pairs": [],
+    "layer_presets": [],
+    "viewports": []
+  },
+  "boards": [],
+  "component_class_settings": {
+    "assignments": [],
+    "meta": {
+      "version": 0
+    },
+    "sheet_component_classes": {
+      "enabled": false
+    }
+  },
+  "cvpcb": {
+    "equivalence_files": []
+  },
+  "erc": {
+    "erc_exclusions": [],
+    "meta": {
+      "version": 0
+    },
+    "pin_map": [
+      [
+        0,
+        0,
+        0,
+        0,
+        0,
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
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+        2,
+        0,
+        1,
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+        1,
+        0,
+        2,
+        2,
+        2,
+        2
+      ],
+      [
+        0,
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+        0,
+        0,
+        0,
+        1,
+        0,
+        1,
+        0,
+        1,
+        2
+      ],
+      [
+        0,
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+        0,
+        0,
+        0,
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+        1,
+        2,
+        1,
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+      ],
+      [
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+        0,
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+        0,
+        0,
+        0,
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+        2
+      ],
+      [
+        0,
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+        0,
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+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        1,
+        1,
+        1,
+        1,
+        1,
+        0,
+        1,
+        1,
+        1,
+        1,
+        1,
+        2
+      ],
+      [
+        0,
+        0,
+        0,
+        1,
+        0,
+        0,
+        1,
+        0,
+        0,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        2,
+        1,
+        2,
+        0,
+        0,
+        1,
+        0,
+        2,
+        2,
+        2,
+        2
+      ],
+      [
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+        2,
+        0,
+        1,
+        0,
+        0,
+        1,
+        0,
+        2,
+        0,
+        0,
+        2
+      ],
+      [
+        0,
+        2,
+        1,
+        1,
+        0,
+        0,
+        1,
+        0,
+        2,
+        0,
+        0,
+        2
+      ],
+      [
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2,
+        2
+      ]
+    ],
+    "rule_severities": {
+      "bus_definition_conflict": "error",
+      "bus_entry_needed": "error",
+      "bus_to_bus_conflict": "error",
+      "bus_to_net_conflict": "error",
+      "different_unit_footprint": "error",
+      "different_unit_net": "error",
+      "duplicate_reference": "error",
+      "duplicate_sheet_names": "error",
+      "endpoint_off_grid": "warning",
+      "extra_units": "error",
+      "field_name_whitespace": "warning",
+      "footprint_filter": "ignore",
+      "footprint_link_issues": "warning",
+      "four_way_junction": "ignore",
+      "ground_pin_not_ground": "warning",
+      "hier_label_mismatch": "error",
+      "isolated_pin_label": "warning",
+      "label_dangling": "error",
+      "label_multiple_wires": "warning",
+      "lib_symbol_issues": "warning",
+      "lib_symbol_mismatch": "warning",
+      "missing_bidi_pin": "warning",
+      "missing_input_pin": "warning",
+      "missing_power_pin": "error",
+      "missing_unit": "warning",
+      "multiple_net_names": "warning",
+      "net_not_bus_member": "warning",
+      "no_connect_connected": "warning",
+      "no_connect_dangling": "warning",
+      "pin_not_connected": "error",
+      "pin_not_driven": "error",
+      "pin_to_pin": "warning",
+      "power_pin_not_driven": "error",
+      "same_local_global_label": "warning",
+      "similar_label_and_power": "warning",
+      "similar_labels": "warning",
+      "similar_power": "warning",
+      "simulation_model_issue": "ignore",
+      "single_global_label": "ignore",
+      "stacked_pin_name": "warning",
+      "unannotated": "error",
+      "unconnected_wire_endpoint": "warning",
+      "undefined_netclass": "error",
+      "unit_value_mismatch": "error",
+      "unresolved_variable": "error",
+      "wire_dangling": "error"
+    }
+  },
+  "libraries": {
+    "pinned_footprint_libs": [],
+    "pinned_symbol_libs": []
+  },
+  "meta": {
+    "filename": "main-control-board.kicad_pro",
+    "version": 3
+  },
+  "net_settings": {
+    "classes": [
+      {
+        "bus_width": 12,
+        "clearance": 0.25,
+        "diff_pair_gap": 0.25,
+        "diff_pair_via_gap": 0.25,
+        "diff_pair_width": 0.25,
+        "line_style": 0,
+        "microvia_diameter": 0.8,
+        "microvia_drill": 0.4,
+        "name": "Default",
+        "pcb_color": "rgba(0, 0, 0, 0.000)",
+        "priority": 2147483647,
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 0.25,
+        "tuning_profile": "",
+        "via_diameter": 0.8,
+        "via_drill": 0.4,
+        "wire_width": 6
+      },
+      {
+        "clearance": 0.25,
+        "diff_pair_gap": 0.25,
+        "diff_pair_width": 0.25,
+        "microvia_diameter": 0.8,
+        "microvia_drill": 0.4,
+        "name": "GND",
+        "pcb_color": "rgb(132, 132, 132)",
+        "priority": 0,
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 0.4,
+        "tuning_profile": "",
+        "via_diameter": 0.8,
+        "via_drill": 0.4
+      },
+      {
+        "clearance": 0.2,
+        "diff_pair_gap": 0.25,
+        "diff_pair_width": 0.25,
+        "microvia_diameter": 0.6,
+        "microvia_drill": 0.3,
+        "name": "Power3V3",
+        "pcb_color": "rgb(221, 133, 0)",
+        "priority": 2,
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 0.4,
+        "tuning_profile": "",
+        "via_diameter": 0.6,
+        "via_drill": 0.3
+      },
+      {
+        "clearance": 0.25,
+        "diff_pair_gap": 0.25,
+        "diff_pair_width": 0.25,
+        "microvia_diameter": 0.8,
+        "microvia_drill": 0.4,
+        "name": "Power5V",
+        "pcb_color": "rgb(194, 0, 0)",
+        "priority": 3,
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 1.5,
+        "tuning_profile": "",
+        "via_diameter": 0.8,
+        "via_drill": 0.4
+      },
+      {
+        "clearance": 0.2,
+        "diff_pair_gap": 0.2,
+        "diff_pair_width": 0.2,
+        "microvia_diameter": 0.6,
+        "microvia_drill": 0.3,
+        "name": "USB",
+        "pcb_color": "rgb(0, 0, 255)",
+        "priority": 1,
+        "schematic_color": "rgba(0, 0, 0, 0.000)",
+        "track_width": 0.2,
+        "tuning_profile": "",
+        "via_diameter": 0.6,
+        "via_drill": 0.3
+      }
+    ],
+    "meta": {
+      "version": 5
+    },
+    "net_colors": null,
+    "netclass_assignments": null,
+    "netclass_patterns": [
+      {
+        "netclass": "GND",
+        "pattern": "GND"
+      },
+      {
+        "netclass": "Power5V",
+        "pattern": "+5V"
+      },
+      {
+        "netclass": "Power3V3",
+        "pattern": "+3.3V"
+      },
+      {
+        "netclass": "USB",
+        "pattern": "/USB_*"
+      },
+      {
+        "netclass": "Default",
+        "pattern": "/I2S_*"
+      },
+      {
+        "netclass": "Default",
+        "pattern": "/I2C_*"
+      }
+    ]
+  },
+  "pcbnew": {
+    "last_paths": {
+      "idf": "",
+      "netlist": "",
+      "plot": "",
+      "specctra_dsn": "",
+      "step": "",
+      "vrml": ""
+    },
+    "page_layout_descr_file": ""
+  },
+  "schematic": {
+    "annotate_start_num": 0,
+    "annotation": {
+      "method": 0,
+      "sort_order": 0
+    },
+    "bom_export_filename": "${PROJECTNAME}.csv",
+    "bom_fmt_presets": [],
+    "bom_fmt_settings": {
+      "field_delimiter": ",",
+      "keep_line_breaks": false,
+      "keep_tabs": false,
+      "name": "CSV",
+      "ref_delimiter": ",",
+      "ref_range_delimiter": "",
+      "string_delimiter": "\""
+    },
+    "bom_presets": [],
+    "bom_settings": {
+      "exclude_dnp": false,
+      "fields_ordered": [
+        {
+          "group_by": false,
+          "label": "Reference",
+          "name": "Reference",
+          "show": true
+        },
+        {
+          "group_by": false,
+          "label": "Qty",
+          "name": "${QUANTITY}",
+          "show": true
+        },
+        {
+          "group_by": true,
+          "label": "Value",
+          "name": "Value",
+          "show": true
+        },
+        {
+          "group_by": true,
+          "label": "DNP",
+          "name": "${DNP}",
+          "show": true
+        },
+        {
+          "group_by": true,
+          "label": "Exclude from BOM",
+          "name": "${EXCLUDE_FROM_BOM}",
+          "show": true
+        },
+        {
+          "group_by": true,
+          "label": "Exclude from Board",
+          "name": "${EXCLUDE_FROM_BOARD}",
+          "show": true
+        },
+        {
+          "group_by": true,
+          "label": "Exclude from Simulation",
+          "name": "${EXCLUDE_FROM_SIM}",
+          "show": true
+        },
+        {
+          "group_by": true,
+          "label": "Exclude from Position Files",
+          "name": "${EXCLUDE_FROM_POS_FILES}",
+          "show": true
+        },
+        {
+          "group_by": true,
+          "label": "Footprint",
+          "name": "Footprint",
+          "show": true
+        },
+        {
+          "group_by": false,
+          "label": "Datasheet",
+          "name": "Datasheet",
+          "show": true
+        },
+        {
+          "group_by": false,
+          "label": "Description",
+          "name": "Description",
+          "show": false
+        },
+        {
+          "group_by": false,
+          "label": "#",
+          "name": "${ITEM_NUMBER}",
+          "show": false
+        },
+        {
+          "group_by": false,
+          "label": "KiLib_Generator",
+          "name": "KiLib_Generator",
+          "show": false
+        }
+      ],
+      "filter_string": "",
+      "group_symbols": true,
+      "include_excluded_from_bom": true,
+      "name": "",
+      "sort_asc": true,
+      "sort_field": "Reference"
+    },
+    "bus_aliases": {},
+    "connection_grid_size": 50.0,
+    "drawing": {
+      "dashed_lines_dash_length_ratio": 12.0,
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+      "default_line_thickness": 6.0,
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+}
diff --git a/hardware/boards/main-control-board/main-control-board.kicad_sch b/hardware/boards/main-control-board/main-control-board.kicad_sch
new file mode 100644
index 0000000..b1ed65f
--- /dev/null
+++ b/hardware/boards/main-control-board/main-control-board.kicad_sch
@@ -0,0 +1,6972 @@
+(kicad_sch
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+	(paper "A4")
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+		(title "TinyEngineer PCB")
+		(date "2026-09-12")
+		(rev "v1")
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+		(property "Datasheet" "https://www.waveshare.com/wiki/ESP32-C3-Zero"
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+		(property "Description" "Waveshare ESP32-C3-Zero module header, pads numbered anticlockwise from USB"
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+			(project "main-control-board"
+				(path "/82a78d11-58ff-455c-a94e-f7463ce9fc2e"
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+		(dnp no)
+		(uuid "ffc6aa5c-99c8-43b1-ad59-4ef994381e01")
+		(property "Reference" "#FLG02"
+			(at 245.11 100.965 0)
+			(hide yes)
+			(show_name no)
+			(do_not_autoplace no)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(property "Value" "PWR_FLAG"
+			(at 245.11 104.14 0)
+			(show_name no)
+			(do_not_autoplace no)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(property "Footprint" ""
+			(at 245.11 99.06 0)
+			(hide yes)
+			(show_name no)
+			(do_not_autoplace no)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(property "Datasheet" ""
+			(at 245.11 99.06 0)
+			(hide yes)
+			(show_name no)
+			(do_not_autoplace no)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(property "Description" "Special symbol for telling ERC where power comes from"
+			(at 245.11 99.06 0)
+			(hide yes)
+			(show_name no)
+			(do_not_autoplace no)
+			(effects
+				(font
+					(size 1.27 1.27)
+				)
+			)
+		)
+		(pin "1"
+			(uuid "8a86b872-0ed9-4b42-bed0-df5dd3c4f057")
+		)
+		(instances
+			(project "main-control-board"
+				(path "/82a78d11-58ff-455c-a94e-f7463ce9fc2e"
+					(reference "#FLG02")
+					(unit 1)
+				)
+			)
+		)
+	)
+	(sheet_instances
+		(path "/"
+			(page "1")
+		)
+	)
+	(embedded_fonts no)
+)
diff --git a/hardware/boards/main-control-board/sym-lib-table b/hardware/boards/main-control-board/sym-lib-table
new file mode 100644
index 0000000..f975faf
--- /dev/null
+++ b/hardware/boards/main-control-board/sym-lib-table
@@ -0,0 +1,4 @@
+(sym_lib_table
+	(version 7)
+	(lib (name "TinyEngineerModules") (type "KiCad") (uri "${KIPRJMOD}/libraries/symbols/tiny_engineer_modules.kicad_sym") (options "") (descr ""))
+)
diff --git a/include/pins.h b/include/pins.h
index edc0df4..47cdd72 100644
--- a/include/pins.h
+++ b/include/pins.h
@@ -18,7 +18,7 @@ constexpr int I2S_DIN  = 4;  // GP4
 // Built-in WS2812 RGB
 constexpr int RGB_LED_PIN = 10;
 
-// PCA9685 output enable (active LOW). Optional: wire OE → GP5.
+// PCA9685 output enable (active LOW). GP5 → OE pending; schematic/PCB do not implement that net.
 constexpr bool PCA9685_OE_WIRED = false;
 constexpr int PCA9685_OE_PIN = 5;
 
diff --git a/scripts/check_pcb.py b/scripts/check_pcb.py
new file mode 100755
index 0000000..2263068
--- /dev/null
+++ b/scripts/check_pcb.py
@@ -0,0 +1,501 @@
+#!/usr/bin/env python3
+"""Run KiCad ERC, DRC, and expected-nets checks for hardware/boards/*.
+
+Requires KiCad 10 (kicad-cli). Stdlib only — no pip packages. Same entrypoint
+locally and in CI:
+
+    python3 scripts/check_pcb.py
+    python3 scripts/check_pcb.py main-control-board
+    python3 scripts/check_pcb.py --report-dir artifacts/pcb
+"""
+
+from __future__ import annotations
+
+import argparse
+import os
+import re
+import shutil
+import subprocess
+import sys
+import tempfile
+from pathlib import Path
+from typing import Any
+
+KICAD_CLI_HINT = (
+    "Install KiCad 10 and ensure kicad-cli is on PATH, "
+    "or set KICAD_CLI to the binary. "
+    "macOS: /Applications/KiCad/KiCad.app/Contents/MacOS/kicad-cli"
+)
+
+
+def find_repo_root(explicit: Path | None) -> Path:
+    if explicit is not None:
+        return explicit.resolve()
+    return Path(__file__).resolve().parent.parent
+
+
+def find_kicad_cli() -> Path:
+    env = os.environ.get("KICAD_CLI")
+    if env:
+        path = Path(env)
+        if path.is_file():
+            return path
+        raise SystemExit(f"error: KICAD_CLI is set but not a file: {env}")
+
+    which = shutil.which("kicad-cli") or shutil.which("kicad-cli.exe")
+    if which:
+        return Path(which)
+
+    mac = Path("/Applications/KiCad/KiCad.app/Contents/MacOS/kicad-cli")
+    if mac.is_file():
+        return mac
+
+    for base in (
+        Path(os.environ.get("ProgramFiles", r"C:\Program Files")) / "KiCad",
+        Path(os.environ.get("ProgramFiles(x86)", r"C:\Program Files (x86)")) / "KiCad",
+    ):
+        if not base.is_dir():
+            continue
+        matches = sorted(base.glob("*/bin/kicad-cli.exe"), reverse=True)
+        if matches:
+            return matches[0]
+
+    raise SystemExit(f"error: kicad-cli not found. {KICAD_CLI_HINT}")
+
+
+def discover_boards(repo_root: Path, names: list[str] | None) -> list[Path]:
+    boards_root = repo_root / "hardware" / "boards"
+    if not boards_root.is_dir():
+        raise SystemExit(f"error: missing boards directory: {boards_root}")
+
+    if names:
+        dirs = [boards_root / name for name in names]
+    else:
+        dirs = sorted(p for p in boards_root.iterdir() if p.is_dir())
+
+    boards: list[Path] = []
+    for board_dir in dirs:
+        name = board_dir.name
+        sch = board_dir / f"{name}.kicad_sch"
+        pcb = board_dir / f"{name}.kicad_pcb"
+        if not board_dir.is_dir():
+            raise SystemExit(f"error: board directory not found: {board_dir}")
+        if not sch.is_file() or not pcb.is_file():
+            if names:
+                raise SystemExit(
+                    f"error: {name} missing {sch.name} and/or {pcb.name}"
+                )
+            continue
+        boards.append(board_dir)
+
+    if not boards:
+        raise SystemExit("error: no KiCad boards found under hardware/boards/")
+    return boards
+
+
+# --- minimal s-expression parser for KiCad netlists ---
+
+
+def _tokenize(text: str) -> list[str]:
+    tokens: list[str] = []
+    i = 0
+    n = len(text)
+    while i < n:
+        c = text[i]
+        if c.isspace():
+            i += 1
+            continue
+        if c in "()":
+            tokens.append(c)
+            i += 1
+            continue
+        if c == '"':
+            i += 1
+            buf: list[str] = []
+            while i < n:
+                if text[i] == "\\" and i + 1 < n:
+                    buf.append(text[i + 1])
+                    i += 2
+                    continue
+                if text[i] == '"':
+                    i += 1
+                    break
+                buf.append(text[i])
+                i += 1
+            tokens.append("".join(buf))
+            continue
+        j = i
+        while j < n and not text[j].isspace() and text[j] not in "()":
+            j += 1
+        tokens.append(text[i:j])
+        i = j
+    return tokens
+
+
+def _parse_tokens(tokens: list[str]) -> Any:
+    if not tokens:
+        raise ValueError("empty sexpr")
+    tok = tokens.pop(0)
+    if tok == "(":
+        out: list[Any] = []
+        while tokens and tokens[0] != ")":
+            out.append(_parse_tokens(tokens))
+        if not tokens:
+            raise ValueError("unclosed sexpr")
+        tokens.pop(0)
+        return out
+    if tok == ")":
+        raise ValueError("unexpected )")
+    return tok
+
+
+def parse_sexpr(text: str) -> Any:
+    tokens = _tokenize(text)
+    tree = _parse_tokens(tokens)
+    if tokens:
+        raise ValueError("trailing tokens in sexpr")
+    return tree
+
+
+def _children(node: list[Any], tag: str) -> list[list[Any]]:
+    return [c for c in node[1:] if isinstance(c, list) and c and c[0] == tag]
+
+
+def _child(node: list[Any], tag: str) -> list[Any] | None:
+    found = _children(node, tag)
+    return found[0] if found else None
+
+
+def _atom(node: list[Any], tag: str) -> str | None:
+    c = _child(node, tag)
+    if c is None or len(c) < 2:
+        return None
+    return str(c[1])
+
+
+def parse_netlist_pins(netlist_text: str) -> dict[str, set[str]]:
+    """Return net name -> set of RefDes.PinNum:PinName tokens."""
+    root = parse_sexpr(netlist_text)
+    if not isinstance(root, list) or root[0] != "export":
+        raise ValueError("netlist root is not (export ...)")
+
+    pin_names: dict[tuple[str, str, str], str] = {}
+    libparts = _child(root, "libparts")
+    if libparts:
+        for libpart in _children(libparts, "libpart"):
+            pins = _child(libpart, "pins")
+            if not pins:
+                continue
+            lib = _atom(libpart, "lib") or ""
+            part = _atom(libpart, "part") or ""
+            for pin in _children(pins, "pin"):
+                num = _atom(pin, "num")
+                name = _atom(pin, "name")
+                if num and name:
+                    pin_names[(lib, part, num)] = name
+
+    ref_libpart: dict[str, tuple[str, str]] = {}
+    components = _child(root, "components")
+    if components:
+        for comp in _children(components, "comp"):
+            ref = _atom(comp, "ref")
+            if not ref:
+                continue
+            libsource = _child(comp, "libsource")
+            if libsource:
+                lib = _atom(libsource, "lib") or ""
+                part = _atom(libsource, "part") or ""
+                ref_libpart[ref] = (lib, part)
+
+    nets_out: dict[str, set[str]] = {}
+    nets = _child(root, "nets")
+    if not nets:
+        return nets_out
+
+    for net in _children(nets, "net"):
+        name = _atom(net, "name")
+        if not name:
+            continue
+        pins: set[str] = set()
+        for node in _children(net, "node"):
+            ref = _atom(node, "ref")
+            pin_num = _atom(node, "pin")
+            if not ref or not pin_num:
+                continue
+            lib_part = ref_libpart.get(ref)
+            pin_name = None
+            if lib_part:
+                pin_name = pin_names.get((lib_part[0], lib_part[1], pin_num))
+            if not pin_name:
+                pf = _atom(node, "pinfunction")
+                if pf and "_" in pf:
+                    left, right = pf.rsplit("_", 1)
+                    if right == pin_num:
+                        pin_name = left
+                if not pin_name:
+                    pin_name = pin_num
+            pins.add(f"{ref}.{pin_num}:{pin_name}")
+        nets_out[name] = pins
+    return nets_out
+
+
+def load_expected_nets(path: Path) -> dict[str, list[str]]:
+    """Parse constrained expected-nets.yml (stdlib only).
+
+    Accepts: # comments, blank lines, top-level `nets:`, bare or double-quoted
+    net keys, and `- Token` list items. Rejects anything else.
+    Pin tokens: RefDes.PinNum:PinName (e.g. ESP1.1:5V).
+    """
+    text = path.read_text(encoding="utf-8")
+    nets: dict[str, list[str]] = {}
+    current: str | None = None
+    seen_nets = False
+    key_re = re.compile(r'^("(?:\\.|[^"\\])*"|[A-Za-z0-9_./+-]+)\s*:\s*$')
+    item_re = re.compile(r"^-\s+(\S+)\s*$")
+
+    for lineno, raw in enumerate(text.splitlines(), start=1):
+        line = raw.split("#", 1)[0].rstrip()
+        if not line.strip():
+            continue
+        stripped = line.strip()
+        indent = len(line) - len(line.lstrip(" "))
+
+        if indent == 0 and stripped == "nets:":
+            if seen_nets:
+                raise ValueError(f"{path}:{lineno}: duplicate 'nets:'")
+            seen_nets = True
+            current = None
+            continue
+
+        if not seen_nets:
+            raise ValueError(
+                f"{path}:{lineno}: expected top-level 'nets:' before other content"
+            )
+
+        if indent == 2:
+            m = key_re.match(stripped)
+            if not m:
+                raise ValueError(
+                    f"{path}:{lineno}: expected net key like GND: or \"+5V\":"
+                )
+            key = m.group(1)
+            if key.startswith('"') and key.endswith('"'):
+                key = key[1:-1].replace(r"\"", '"').replace(r"\\", "\\")
+            if key in nets:
+                raise ValueError(f"{path}:{lineno}: duplicate net {key!r}")
+            nets[key] = []
+            current = key
+            continue
+
+        if indent == 4 and current is not None:
+            m = item_re.match(stripped)
+            if not m:
+                raise ValueError(
+                    f"{path}:{lineno}: expected list item "
+                    f"'- RefDes.PinNum:PinName'"
+                )
+            nets[current].append(m.group(1))
+            continue
+
+        raise ValueError(f"{path}:{lineno}: unsupported line: {raw!r}")
+
+    if not seen_nets:
+        raise ValueError(f"{path}: missing top-level 'nets:'")
+    if not nets:
+        raise ValueError(f"{path}: 'nets:' has no entries")
+    return nets
+
+
+def check_expected_nets(expected_path: Path, netlist_path: Path) -> list[str]:
+    errors: list[str] = []
+    try:
+        expected_nets = load_expected_nets(expected_path)
+    except ValueError as exc:
+        return [str(exc)]
+
+    netlist_text = netlist_path.read_text(encoding="utf-8")
+    actual = parse_netlist_pins(netlist_text)
+
+    for net_name, pins in expected_nets.items():
+        want = set(pins)
+        got = actual.get(net_name)
+        if got is None:
+            errors.append(f"net {net_name!r}: missing from netlist")
+            continue
+        missing = sorted(want - got)
+        extra = sorted(got - want)
+        if missing:
+            errors.append(
+                f"net {net_name!r}: missing pins: {', '.join(missing)}"
+            )
+        if extra:
+            errors.append(
+                f"net {net_name!r}: unexpected pins: {', '.join(extra)}"
+            )
+    return errors
+
+
+def run_kicad(kicad_cli: Path, args: list[str], *, label: str) -> int:
+    cmd = [str(kicad_cli), *args]
+    print(f"  $ {' '.join(cmd)}")
+    proc = subprocess.run(cmd, check=False)
+    if proc.returncode not in (0, 5):
+        print(
+            f"error: {label} failed with unexpected exit {proc.returncode}",
+            file=sys.stderr,
+        )
+    return proc.returncode
+
+
+def check_board(kicad_cli: Path, board_dir: Path, report_dir: Path) -> bool:
+    name = board_dir.name
+    sch = board_dir / f"{name}.kicad_sch"
+    pcb = board_dir / f"{name}.kicad_pcb"
+    expected = board_dir / "expected-nets.yml"
+    report_dir.mkdir(parents=True, exist_ok=True)
+
+    erc_json = report_dir / "erc.json"
+    drc_json = report_dir / "drc.json"
+    netlist = report_dir / "netlist.net"
+
+    print(f"==> {name}")
+
+    if not expected.is_file():
+        print(f"error: missing {expected}", file=sys.stderr)
+        return False
+
+    erc_rc = run_kicad(
+        kicad_cli,
+        [
+            "sch",
+            "erc",
+            "--format",
+            "json",
+            "--severity-error",
+            "--exit-code-violations",
+            "-o",
+            str(erc_json),
+            str(sch),
+        ],
+        label="ERC",
+    )
+    if erc_rc == 5:
+        print(f"error: ERC errors — see {erc_json}", file=sys.stderr)
+        return False
+    if erc_rc != 0:
+        return False
+    print(f"  ERC OK ({erc_json})")
+
+    drc_rc = run_kicad(
+        kicad_cli,
+        [
+            "pcb",
+            "drc",
+            "--format",
+            "json",
+            "--severity-error",
+            "--schematic-parity",
+            "--refill-zones",
+            "--exit-code-violations",
+            "-o",
+            str(drc_json),
+            str(pcb),
+        ],
+        label="DRC",
+    )
+    if drc_rc == 5:
+        print(f"error: DRC errors — see {drc_json}", file=sys.stderr)
+        return False
+    if drc_rc != 0:
+        return False
+    print(f"  DRC OK ({drc_json})")
+
+    net_rc = run_kicad(
+        kicad_cli,
+        ["sch", "export", "netlist", "-o", str(netlist), str(sch)],
+        label="netlist export",
+    )
+    if net_rc != 0:
+        return False
+
+    net_errors = check_expected_nets(expected, netlist)
+    if net_errors:
+        print(f"error: expected-nets mismatch for {name}:", file=sys.stderr)
+        for err in net_errors:
+            print(f"  - {err}", file=sys.stderr)
+        return False
+    print(f"  expected-nets OK ({expected.name})")
+    return True
+
+
+def main(argv: list[str] | None = None) -> int:
+    parser = argparse.ArgumentParser(
+        description="KiCad ERC, DRC, and expected-nets for hardware/boards/"
+    )
+    parser.add_argument(
+        "boards",
+        nargs="*",
+        help="Board directory names under hardware/boards/ (default: all)",
+    )
+    parser.add_argument(
+        "--repo-root",
+        type=Path,
+        default=None,
+        help="Repository root (default: parent of scripts/)",
+    )
+    parser.add_argument(
+        "--report-dir",
+        type=Path,
+        default=None,
+        help="Write per-board reports here (default: temp dir, or PCB_REPORT_DIR)",
+    )
+    args = parser.parse_args(argv)
+
+    repo_root = find_repo_root(args.repo_root)
+    report_root = args.report_dir
+    if report_root is None:
+        env_dir = os.environ.get("PCB_REPORT_DIR")
+        report_root = Path(env_dir) if env_dir else None
+
+    kicad_cli = find_kicad_cli()
+    print(f"kicad-cli: {kicad_cli}")
+    ver = subprocess.run(
+        [str(kicad_cli), "version"],
+        check=False,
+        capture_output=True,
+        text=True,
+    )
+    if ver.stdout.strip():
+        print(f"version: {ver.stdout.strip()}")
+
+    boards = discover_boards(repo_root, args.boards or None)
+
+    owned_temp: Path | None = None
+    if report_root is None:
+        owned_temp = Path(tempfile.mkdtemp(prefix="tiny-engineer-pcb-"))
+        report_root = owned_temp
+    else:
+        report_root = report_root.resolve()
+        report_root.mkdir(parents=True, exist_ok=True)
+
+    print(f"reports: {report_root}")
+
+    ok = True
+    for board_dir in boards:
+        if not check_board(kicad_cli, board_dir, report_root / board_dir.name):
+            ok = False
+            break
+
+    if ok:
+        print("All PCB checks passed.")
+        if owned_temp is not None:
+            shutil.rmtree(owned_temp, ignore_errors=True)
+        return 0
+
+    print("PCB checks failed.", file=sys.stderr)
+    print(f"reports kept at: {report_root}", file=sys.stderr)
+    return 1
+
+
+if __name__ == "__main__":
+    sys.exit(main())