From 5d8d864a7304cf37277caeadc5f224f76e48ecc1 Mon Sep 17 00:00:00 2001 From: Eric Voskuil Date: Tue, 10 Nov 2026 20:58:03 -0500 Subject: [PATCH 1/2] Regenerate artifacts. --- builds/cmake/install-cmake.sh | 56 +++++++++---------- builds/cmake/install-presets.sh | 56 +++++++++---------- builds/gnu/install-gnu.sh | 56 +++++++++---------- builds/msvc/build-msvc.cmd | 28 +++++----- builds/msvc/properties/Win32.props | 10 ++-- builds/msvc/properties/x64.props | 10 ++-- .../vs2026/libbitcoin-system.import.props | 19 ++++++- 7 files changed, 126 insertions(+), 109 deletions(-) diff --git a/builds/cmake/install-cmake.sh b/builds/cmake/install-cmake.sh index 838be528d..3aa49279e 100755 --- a/builds/cmake/install-cmake.sh +++ b/builds/cmake/install-cmake.sh @@ -41,22 +41,22 @@ # # Hardware configuration options for arm64: # --hardware-aes Use ARM AES and PMULL Extensions. -# --hardware-sha2 Use ARM SHA1/SHA256 Extensions. -# --hardware-sha3 Use ARM SHA3 Extensions for SHA512. +# --hardware-sha2 Use ARM SHA1/SHA256 Extensions (implies AES). +# --hardware-sha3 Use ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES). # # Hardware configuration options for x64: -# --hardware-avx2 Use Intel AVX2 intrinsics. -# --hardware-avx512 Use Intel AVX512 intrinsics. -# --hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512VL). -# --hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2). -# --hardware-shani Use Intel SHA Extensions. +# --hardware-avx2 Use Intel AVX2 intrinsics (implies AES-NI). +# --hardware-avx512 Use Intel AVX512 intrinsics (implies AVX2 and AES-NI). +# --hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI). +# --hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI). +# --hardware-shani Use Intel SHA Extensions (implies AES-NI). # --hardware-sha512 Use Intel SHA512 Extensions (implies AVX2). # --hardware-sse41 Use SSE4.1 hardware instructions. # --hardware-aesni Use Intel AES-NI and PCLMULQDQ intrinsics. # --hardware-vaes Use Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2). # # Recognized pass-through options: -# -Denable-shani= Add Intel SHA Extensions via compilation options. +# -Denable-shani= Add Intel SHA Extensions (implies AES-NI) via compilation options. # Default: OFF # -Denable-sha512= Add Intel SHA512 Extensions (implies AVX2) via compilation options. # Default: OFF @@ -64,19 +64,19 @@ # Default: OFF # -Denable-vaes= Add Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2) via compilation options. # Default: OFF -# -Denable-avx512ifma= Add Intel AVX512 IFMA intrinsics (implies AVX512VL) via compilation options. +# -Denable-avx512ifma= Add Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI) via compilation options. # Default: OFF -# -Denable-avx512= Add Intel AVX512 intrinsics via compilation options. +# -Denable-avx512= Add Intel AVX512 intrinsics (implies AVX2 and AES-NI) via compilation options. # Default: OFF -# -Denable-avxifma= Add Intel AVX IFMA intrinsics (implies AVX2) via compilation options. +# -Denable-avxifma= Add Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI) via compilation options. # Default: OFF -# -Denable-avx2= Add Intel AVX2 intrinsics via compilation options. +# -Denable-avx2= Add Intel AVX2 intrinsics (implies AES-NI) via compilation options. # Default: OFF # -Denable-sse41= Add SSE4.1 hardware instructions via compilation options. # Default: OFF -# -Denable-sha2= Check for ARM SHA1/SHA256 Extensions. +# -Denable-sha2= Check for ARM SHA1/SHA256 Extensions (implies AES). # Default: OFF -# -Denable-sha3= Check for ARM SHA3 Extensions for SHA512. +# -Denable-sha3= Check for ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES). # Default: OFF # -Denable-aes= Check for ARM AES and PMULL Extensions. # Default: OFF @@ -998,22 +998,22 @@ help() msg "" msg "Hardware configuration options for arm64:" msg "--hardware-aes Use ARM AES and PMULL Extensions." - msg "--hardware-sha2 Use ARM SHA1/SHA256 Extensions." - msg "--hardware-sha3 Use ARM SHA3 Extensions for SHA512." + msg "--hardware-sha2 Use ARM SHA1/SHA256 Extensions (implies AES)." + msg "--hardware-sha3 Use ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES)." msg "" msg "Hardware configuration options for x64:" - msg "--hardware-avx2 Use Intel AVX2 intrinsics." - msg "--hardware-avx512 Use Intel AVX512 intrinsics." - msg "--hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512VL)." - msg "--hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2)." - msg "--hardware-shani Use Intel SHA Extensions." + msg "--hardware-avx2 Use Intel AVX2 intrinsics (implies AES-NI)." + msg "--hardware-avx512 Use Intel AVX512 intrinsics (implies AVX2 and AES-NI)." + msg "--hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI)." + msg "--hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI)." + msg "--hardware-shani Use Intel SHA Extensions (implies AES-NI)." msg "--hardware-sha512 Use Intel SHA512 Extensions (implies AVX2)." msg "--hardware-sse41 Use SSE4.1 hardware instructions." msg "--hardware-aesni Use Intel AES-NI and PCLMULQDQ intrinsics." msg "--hardware-vaes Use Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2)." msg "" msg "Recognized pass-through options:" - msg "-Denable-shani= Add Intel SHA Extensions via compilation options." + msg "-Denable-shani= Add Intel SHA Extensions (implies AES-NI) via compilation options." msg " Default: OFF" msg "-Denable-sha512= Add Intel SHA512 Extensions (implies AVX2) via compilation options." msg " Default: OFF" @@ -1021,19 +1021,19 @@ help() msg " Default: OFF" msg "-Denable-vaes= Add Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2) via compilation options." msg " Default: OFF" - msg "-Denable-avx512ifma= Add Intel AVX512 IFMA intrinsics (implies AVX512VL) via compilation options." + msg "-Denable-avx512ifma= Add Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI) via compilation options." msg " Default: OFF" - msg "-Denable-avx512= Add Intel AVX512 intrinsics via compilation options." + msg "-Denable-avx512= Add Intel AVX512 intrinsics (implies AVX2 and AES-NI) via compilation options." msg " Default: OFF" - msg "-Denable-avxifma= Add Intel AVX IFMA intrinsics (implies AVX2) via compilation options." + msg "-Denable-avxifma= Add Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI) via compilation options." msg " Default: OFF" - msg "-Denable-avx2= Add Intel AVX2 intrinsics via compilation options." + msg "-Denable-avx2= Add Intel AVX2 intrinsics (implies AES-NI) via compilation options." msg " Default: OFF" msg "-Denable-sse41= Add SSE4.1 hardware instructions via compilation options." msg " Default: OFF" - msg "-Denable-sha2= Check for ARM SHA1/SHA256 Extensions." + msg "-Denable-sha2= Check for ARM SHA1/SHA256 Extensions (implies AES)." msg " Default: OFF" - msg "-Denable-sha3= Check for ARM SHA3 Extensions for SHA512." + msg "-Denable-sha3= Check for ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES)." msg " Default: OFF" msg "-Denable-aes= Check for ARM AES and PMULL Extensions." msg " Default: OFF" diff --git a/builds/cmake/install-presets.sh b/builds/cmake/install-presets.sh index 4b9ced408..c6b34778e 100755 --- a/builds/cmake/install-presets.sh +++ b/builds/cmake/install-presets.sh @@ -31,22 +31,22 @@ # # Hardware configuration options for arm64: # --hardware-aes Use ARM AES and PMULL Extensions. -# --hardware-sha2 Use ARM SHA1/SHA256 Extensions. -# --hardware-sha3 Use ARM SHA3 Extensions for SHA512. +# --hardware-sha2 Use ARM SHA1/SHA256 Extensions (implies AES). +# --hardware-sha3 Use ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES). # # Hardware configuration options for x64: -# --hardware-avx2 Use Intel AVX2 intrinsics. -# --hardware-avx512 Use Intel AVX512 intrinsics. -# --hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512VL). -# --hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2). -# --hardware-shani Use Intel SHA Extensions. +# --hardware-avx2 Use Intel AVX2 intrinsics (implies AES-NI). +# --hardware-avx512 Use Intel AVX512 intrinsics (implies AVX2 and AES-NI). +# --hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI). +# --hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI). +# --hardware-shani Use Intel SHA Extensions (implies AES-NI). # --hardware-sha512 Use Intel SHA512 Extensions (implies AVX2). # --hardware-sse41 Use SSE4.1 hardware instructions. # --hardware-aesni Use Intel AES-NI and PCLMULQDQ intrinsics. # --hardware-vaes Use Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2). # # Recognized pass-through options: -# -Denable-shani= Add Intel SHA Extensions via compilation options. +# -Denable-shani= Add Intel SHA Extensions (implies AES-NI) via compilation options. # Default: OFF # -Denable-sha512= Add Intel SHA512 Extensions (implies AVX2) via compilation options. # Default: OFF @@ -54,19 +54,19 @@ # Default: OFF # -Denable-vaes= Add Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2) via compilation options. # Default: OFF -# -Denable-avx512ifma= Add Intel AVX512 IFMA intrinsics (implies AVX512VL) via compilation options. +# -Denable-avx512ifma= Add Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI) via compilation options. # Default: OFF -# -Denable-avx512= Add Intel AVX512 intrinsics via compilation options. +# -Denable-avx512= Add Intel AVX512 intrinsics (implies AVX2 and AES-NI) via compilation options. # Default: OFF -# -Denable-avxifma= Add Intel AVX IFMA intrinsics (implies AVX2) via compilation options. +# -Denable-avxifma= Add Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI) via compilation options. # Default: OFF -# -Denable-avx2= Add Intel AVX2 intrinsics via compilation options. +# -Denable-avx2= Add Intel AVX2 intrinsics (implies AES-NI) via compilation options. # Default: OFF # -Denable-sse41= Add SSE4.1 hardware instructions via compilation options. # Default: OFF -# -Denable-sha2= Check for ARM SHA1/SHA256 Extensions. +# -Denable-sha2= Check for ARM SHA1/SHA256 Extensions (implies AES). # Default: OFF -# -Denable-sha3= Check for ARM SHA3 Extensions for SHA512. +# -Denable-sha3= Check for ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES). # Default: OFF # -Denable-aes= Check for ARM AES and PMULL Extensions. # Default: OFF @@ -1069,22 +1069,22 @@ help() msg "" msg "Hardware configuration options for arm64:" msg "--hardware-aes Use ARM AES and PMULL Extensions." - msg "--hardware-sha2 Use ARM SHA1/SHA256 Extensions." - msg "--hardware-sha3 Use ARM SHA3 Extensions for SHA512." + msg "--hardware-sha2 Use ARM SHA1/SHA256 Extensions (implies AES)." + msg "--hardware-sha3 Use ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES)." msg "" msg "Hardware configuration options for x64:" - msg "--hardware-avx2 Use Intel AVX2 intrinsics." - msg "--hardware-avx512 Use Intel AVX512 intrinsics." - msg "--hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512VL)." - msg "--hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2)." - msg "--hardware-shani Use Intel SHA Extensions." + msg "--hardware-avx2 Use Intel AVX2 intrinsics (implies AES-NI)." + msg "--hardware-avx512 Use Intel AVX512 intrinsics (implies AVX2 and AES-NI)." + msg "--hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI)." + msg "--hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI)." + msg "--hardware-shani Use Intel SHA Extensions (implies AES-NI)." msg "--hardware-sha512 Use Intel SHA512 Extensions (implies AVX2)." msg "--hardware-sse41 Use SSE4.1 hardware instructions." msg "--hardware-aesni Use Intel AES-NI and PCLMULQDQ intrinsics." msg "--hardware-vaes Use Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2)." msg "" msg "Recognized pass-through options:" - msg "-Denable-shani= Add Intel SHA Extensions via compilation options." + msg "-Denable-shani= Add Intel SHA Extensions (implies AES-NI) via compilation options." msg " Default: OFF" msg "-Denable-sha512= Add Intel SHA512 Extensions (implies AVX2) via compilation options." msg " Default: OFF" @@ -1092,19 +1092,19 @@ help() msg " Default: OFF" msg "-Denable-vaes= Add Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2) via compilation options." msg " Default: OFF" - msg "-Denable-avx512ifma= Add Intel AVX512 IFMA intrinsics (implies AVX512VL) via compilation options." + msg "-Denable-avx512ifma= Add Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI) via compilation options." msg " Default: OFF" - msg "-Denable-avx512= Add Intel AVX512 intrinsics via compilation options." + msg "-Denable-avx512= Add Intel AVX512 intrinsics (implies AVX2 and AES-NI) via compilation options." msg " Default: OFF" - msg "-Denable-avxifma= Add Intel AVX IFMA intrinsics (implies AVX2) via compilation options." + msg "-Denable-avxifma= Add Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI) via compilation options." msg " Default: OFF" - msg "-Denable-avx2= Add Intel AVX2 intrinsics via compilation options." + msg "-Denable-avx2= Add Intel AVX2 intrinsics (implies AES-NI) via compilation options." msg " Default: OFF" msg "-Denable-sse41= Add SSE4.1 hardware instructions via compilation options." msg " Default: OFF" - msg "-Denable-sha2= Check for ARM SHA1/SHA256 Extensions." + msg "-Denable-sha2= Check for ARM SHA1/SHA256 Extensions (implies AES)." msg " Default: OFF" - msg "-Denable-sha3= Check for ARM SHA3 Extensions for SHA512." + msg "-Denable-sha3= Check for ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES)." msg " Default: OFF" msg "-Denable-aes= Check for ARM AES and PMULL Extensions." msg " Default: OFF" diff --git a/builds/gnu/install-gnu.sh b/builds/gnu/install-gnu.sh index 40e06e858..266ae50d8 100755 --- a/builds/gnu/install-gnu.sh +++ b/builds/gnu/install-gnu.sh @@ -42,22 +42,22 @@ # # Hardware configuration options for arm64: # --hardware-aes Use ARM AES and PMULL Extensions. -# --hardware-sha2 Use ARM SHA1/SHA256 Extensions. -# --hardware-sha3 Use ARM SHA3 Extensions for SHA512. +# --hardware-sha2 Use ARM SHA1/SHA256 Extensions (implies AES). +# --hardware-sha3 Use ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES). # # Hardware configuration options for x64: -# --hardware-avx2 Use Intel AVX2 intrinsics. -# --hardware-avx512 Use Intel AVX512 intrinsics. -# --hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512VL). -# --hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2). -# --hardware-shani Use Intel SHA Extensions. +# --hardware-avx2 Use Intel AVX2 intrinsics (implies AES-NI). +# --hardware-avx512 Use Intel AVX512 intrinsics (implies AVX2 and AES-NI). +# --hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI). +# --hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI). +# --hardware-shani Use Intel SHA Extensions (implies AES-NI). # --hardware-sha512 Use Intel SHA512 Extensions (implies AVX2). # --hardware-sse41 Use SSE4.1 hardware instructions. # --hardware-aesni Use Intel AES-NI and PCLMULQDQ intrinsics. # --hardware-vaes Use Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2). # # Recognized pass-through options: -# ---shani Add Intel SHA Extensions via compilation options. +# ---shani Add Intel SHA Extensions (implies AES-NI) via compilation options. # Default: --disable-shani # ---sha512 Add Intel SHA512 Extensions (implies AVX2) via compilation options. # Default: --disable-sha512 @@ -65,19 +65,19 @@ # Default: --disable-aesni # ---vaes Add Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2) via compilation options. # Default: --disable-vaes -# ---avx512ifma Add Intel AVX512 IFMA intrinsics (implies AVX512VL) via compilation options. +# ---avx512ifma Add Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI) via compilation options. # Default: --disable-avx512ifma -# ---avx512 Add Intel AVX512 intrinsics via compilation options. +# ---avx512 Add Intel AVX512 intrinsics (implies AVX2 and AES-NI) via compilation options. # Default: --disable-avx512 -# ---avxifma Add Intel AVX IFMA intrinsics (implies AVX2) via compilation options. +# ---avxifma Add Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI) via compilation options. # Default: --disable-avxifma -# ---avx2 Add Intel AVX2 intrinsics via compilation options. +# ---avx2 Add Intel AVX2 intrinsics (implies AES-NI) via compilation options. # Default: --disable-avx2 # ---sse41 Add SSE4.1 hardware instructions via compilation options. # Default: --disable-sse41 -# ---sha2 Check for ARM SHA1/SHA256 Extensions. +# ---sha2 Check for ARM SHA1/SHA256 Extensions (implies AES). # Default: --disable-sha2 -# ---sha3 Check for ARM SHA3 Extensions for SHA512. +# ---sha3 Check for ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES). # Default: --disable-sha3 # ---aes Check for ARM AES and PMULL Extensions. # Default: --disable-aes @@ -1070,22 +1070,22 @@ help() msg "" msg "Hardware configuration options for arm64:" msg "--hardware-aes Use ARM AES and PMULL Extensions." - msg "--hardware-sha2 Use ARM SHA1/SHA256 Extensions." - msg "--hardware-sha3 Use ARM SHA3 Extensions for SHA512." + msg "--hardware-sha2 Use ARM SHA1/SHA256 Extensions (implies AES)." + msg "--hardware-sha3 Use ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES)." msg "" msg "Hardware configuration options for x64:" - msg "--hardware-avx2 Use Intel AVX2 intrinsics." - msg "--hardware-avx512 Use Intel AVX512 intrinsics." - msg "--hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512VL)." - msg "--hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2)." - msg "--hardware-shani Use Intel SHA Extensions." + msg "--hardware-avx2 Use Intel AVX2 intrinsics (implies AES-NI)." + msg "--hardware-avx512 Use Intel AVX512 intrinsics (implies AVX2 and AES-NI)." + msg "--hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI)." + msg "--hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI)." + msg "--hardware-shani Use Intel SHA Extensions (implies AES-NI)." msg "--hardware-sha512 Use Intel SHA512 Extensions (implies AVX2)." msg "--hardware-sse41 Use SSE4.1 hardware instructions." msg "--hardware-aesni Use Intel AES-NI and PCLMULQDQ intrinsics." msg "--hardware-vaes Use Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2)." msg "" msg "Recognized pass-through options:" - msg "---shani Add Intel SHA Extensions via compilation options." + msg "---shani Add Intel SHA Extensions (implies AES-NI) via compilation options." msg " Default: --disable-shani" msg "---sha512 Add Intel SHA512 Extensions (implies AVX2) via compilation options." msg " Default: --disable-sha512" @@ -1093,19 +1093,19 @@ help() msg " Default: --disable-aesni" msg "---vaes Add Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2) via compilation options." msg " Default: --disable-vaes" - msg "---avx512ifma Add Intel AVX512 IFMA intrinsics (implies AVX512VL) via compilation options." + msg "---avx512ifma Add Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI) via compilation options." msg " Default: --disable-avx512ifma" - msg "---avx512 Add Intel AVX512 intrinsics via compilation options." + msg "---avx512 Add Intel AVX512 intrinsics (implies AVX2 and AES-NI) via compilation options." msg " Default: --disable-avx512" - msg "---avxifma Add Intel AVX IFMA intrinsics (implies AVX2) via compilation options." + msg "---avxifma Add Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI) via compilation options." msg " Default: --disable-avxifma" - msg "---avx2 Add Intel AVX2 intrinsics via compilation options." + msg "---avx2 Add Intel AVX2 intrinsics (implies AES-NI) via compilation options." msg " Default: --disable-avx2" msg "---sse41 Add SSE4.1 hardware instructions via compilation options." msg " Default: --disable-sse41" - msg "---sha2 Check for ARM SHA1/SHA256 Extensions." + msg "---sha2 Check for ARM SHA1/SHA256 Extensions (implies AES)." msg " Default: --disable-sha2" - msg "---sha3 Check for ARM SHA3 Extensions for SHA512." + msg "---sha3 Check for ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES)." msg " Default: --disable-sha3" msg "---aes Check for ARM AES and PMULL Extensions." msg " Default: --disable-aes" diff --git a/builds/msvc/build-msvc.cmd b/builds/msvc/build-msvc.cmd index 15d632d56..b535f2f25 100644 --- a/builds/msvc/build-msvc.cmd +++ b/builds/msvc/build-msvc.cmd @@ -11,17 +11,17 @@ REM ########################################################################### REM Script managing the build of libbitcoin-database. REM REM Script options: -REM --enable-shani Add Intel SHA Extensions via compilation options. +REM --enable-shani Add Intel SHA Extensions (implies AES-NI) via compilation options. REM --enable-sha512 Add Intel SHA512 Extensions (implies AVX2) via compilation options. REM --enable-aesni Add Intel AES-NI and PCLMULQDQ intrinsics via compilation options. REM --enable-vaes Add Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2) via compilation options. -REM --enable-avx512ifma Add Intel AVX512 IFMA intrinsics (implies AVX512VL) via compilation options. -REM --enable-avx512 Add Intel AVX512 intrinsics via compilation options. -REM --enable-avxifma Add Intel AVX IFMA intrinsics (implies AVX2) via compilation options. -REM --enable-avx2 Add Intel AVX2 intrinsics via compilation options. +REM --enable-avx512ifma Add Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI) via compilation options. +REM --enable-avx512 Add Intel AVX512 intrinsics (implies AVX2 and AES-NI) via compilation options. +REM --enable-avxifma Add Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI) via compilation options. +REM --enable-avx2 Add Intel AVX2 intrinsics (implies AES-NI) via compilation options. REM --enable-sse41 Add SSE4.1 hardware instructions via compilation options. -REM --enable-sha2 Check for ARM SHA1/SHA256 Extensions. -REM --enable-sha3 Check for ARM SHA3 Extensions for SHA512. +REM --enable-sha2 Check for ARM SHA1/SHA256 Extensions (implies AES). +REM --enable-sha3 Check for ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES). REM --enable-aes Check for ARM AES and PMULL Extensions. REM --build-config config Build configuration. REM --build-platform platform Build platform. @@ -545,17 +545,17 @@ if "!libbitcoin_database_TAG!" == "" ( call :msg "Script managing the build of libbitcoin-database." call :msg "" call :msg "Script options:" - call :msg "--enable-shani Add Intel SHA Extensions via compilation options." + call :msg "--enable-shani Add Intel SHA Extensions (implies AES-NI) via compilation options." call :msg "--enable-sha512 Add Intel SHA512 Extensions (implies AVX2) via compilation options." call :msg "--enable-aesni Add Intel AES-NI and PCLMULQDQ intrinsics via compilation options." call :msg "--enable-vaes Add Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2) via compilation options." - call :msg "--enable-avx512ifma Add Intel AVX512 IFMA intrinsics (implies AVX512VL) via compilation options." - call :msg "--enable-avx512 Add Intel AVX512 intrinsics via compilation options." - call :msg "--enable-avxifma Add Intel AVX IFMA intrinsics (implies AVX2) via compilation options." - call :msg "--enable-avx2 Add Intel AVX2 intrinsics via compilation options." + call :msg "--enable-avx512ifma Add Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI) via compilation options." + call :msg "--enable-avx512 Add Intel AVX512 intrinsics (implies AVX2 and AES-NI) via compilation options." + call :msg "--enable-avxifma Add Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI) via compilation options." + call :msg "--enable-avx2 Add Intel AVX2 intrinsics (implies AES-NI) via compilation options." call :msg "--enable-sse41 Add SSE4.1 hardware instructions via compilation options." - call :msg "--enable-sha2 Check for ARM SHA1/SHA256 Extensions." - call :msg "--enable-sha3 Check for ARM SHA3 Extensions for SHA512." + call :msg "--enable-sha2 Check for ARM SHA1/SHA256 Extensions (implies AES)." + call :msg "--enable-sha3 Check for ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES)." call :msg "--enable-aes Check for ARM AES and PMULL Extensions." call :msg "--build-config config Build configuration." call :msg "--build-platform platform Build platform." diff --git a/builds/msvc/properties/Win32.props b/builds/msvc/properties/Win32.props index ba04cb33b..0bdec8460 100644 --- a/builds/msvc/properties/Win32.props +++ b/builds/msvc/properties/Win32.props @@ -15,11 +15,11 @@ WIN32;_WIN32;%(PreprocessorDefinitions) - StreamingSIMDExtensions - StreamingSIMDExtensions2 - AdvancedVectorExtensions - AdvancedVectorExtensions2 - AdvancedVectorExtensions512 + StreamingSIMDExtensions + StreamingSIMDExtensions2 + AdvancedVectorExtensions + AdvancedVectorExtensions2 + AdvancedVectorExtensions512 MachineX86 diff --git a/builds/msvc/properties/x64.props b/builds/msvc/properties/x64.props index 054f85cd5..e6db903c9 100644 --- a/builds/msvc/properties/x64.props +++ b/builds/msvc/properties/x64.props @@ -15,11 +15,11 @@ WIN32;_WIN32;WIN64;_WIN64;%(PreprocessorDefinitions) - StreamingSIMDExtensions - StreamingSIMDExtensions2 - AdvancedVectorExtensions - AdvancedVectorExtensions2 - AdvancedVectorExtensions512 + StreamingSIMDExtensions + StreamingSIMDExtensions2 + AdvancedVectorExtensions + AdvancedVectorExtensions2 + AdvancedVectorExtensions512 MachineX64 diff --git a/builds/msvc/vs2026/libbitcoin-system.import.props b/builds/msvc/vs2026/libbitcoin-system.import.props index 480ed3d07..37430d09f 100644 --- a/builds/msvc/vs2026/libbitcoin-system.import.props +++ b/builds/msvc/vs2026/libbitcoin-system.import.props @@ -30,8 +30,24 @@ false + + true + true + true + true + true + true + true + true + true + true + true + true + true + true + + - AdvancedVectorExtensions AdvancedVectorExtensions2 AdvancedVectorExtensions512 @@ -44,6 +60,7 @@ WITH_AVXIFMA;%(PreprocessorDefinitions) WITH_SHANI;%(PreprocessorDefinitions) WITH_SHA512;%(PreprocessorDefinitions) + WITH_SSE41;%(PreprocessorDefinitions) WITH_AESNI;%(PreprocessorDefinitions) WITH_VAES;%(PreprocessorDefinitions) WITH_AES;%(PreprocessorDefinitions) From c8939d7d46453be4d672cc562375d352affbe292 Mon Sep 17 00:00:00 2001 From: Eric Voskuil Date: Wed, 11 Nov 2026 01:20:59 -0500 Subject: [PATCH 2/2] Regenerate install scripts. --- builds/cmake/install-cmake.sh | 35 +++++++++++++++++++++++++++++++++ builds/cmake/install-presets.sh | 35 +++++++++++++++++++++++++++++++++ builds/gnu/install-gnu.sh | 35 +++++++++++++++++++++++++++++++++ 3 files changed, 105 insertions(+) diff --git a/builds/cmake/install-cmake.sh b/builds/cmake/install-cmake.sh index 3aa49279e..dd82bbd8c 100755 --- a/builds/cmake/install-cmake.sh +++ b/builds/cmake/install-cmake.sh @@ -414,6 +414,41 @@ main() ARCHTUNE="-march=native -mtune=native" fi + if [[ "${HARDWARE_SHA2}" == "yes" ]]; then + HARDWARE_AES="yes" + fi + + if [[ "${HARDWARE_SHA3}" == "yes" ]]; then + HARDWARE_SHA2="yes" + HARDWARE_AES="yes" + fi + + if [[ "${HARDWARE_AVX2}" == "yes" ]]; then + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_AVX512}" == "yes" ]]; then + HARDWARE_AVX2="yes" + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_AVX512IFMA}" == "yes" ]]; then + HARDWARE_AVX512="yes" + HARDWARE_AVX2="yes" + HARDWARE_SHANI="yes" + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_AVXIFMA}" == "yes" ]]; then + HARDWARE_AVX2="yes" + HARDWARE_SHANI="yes" + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_SHANI}" == "yes" ]]; then + HARDWARE_AESNI="yes" + fi + # Platform options: arm64 if [[ "${HARDWARE_AES}" == "yes" ]]; then diff --git a/builds/cmake/install-presets.sh b/builds/cmake/install-presets.sh index c6b34778e..9f0bdf27f 100755 --- a/builds/cmake/install-presets.sh +++ b/builds/cmake/install-presets.sh @@ -462,6 +462,41 @@ main() ARCHTUNE="-march=native -mtune=native" fi + if [[ "${HARDWARE_SHA2}" == "yes" ]]; then + HARDWARE_AES="yes" + fi + + if [[ "${HARDWARE_SHA3}" == "yes" ]]; then + HARDWARE_SHA2="yes" + HARDWARE_AES="yes" + fi + + if [[ "${HARDWARE_AVX2}" == "yes" ]]; then + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_AVX512}" == "yes" ]]; then + HARDWARE_AVX2="yes" + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_AVX512IFMA}" == "yes" ]]; then + HARDWARE_AVX512="yes" + HARDWARE_AVX2="yes" + HARDWARE_SHANI="yes" + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_AVXIFMA}" == "yes" ]]; then + HARDWARE_AVX2="yes" + HARDWARE_SHANI="yes" + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_SHANI}" == "yes" ]]; then + HARDWARE_AESNI="yes" + fi + # Platform options: arm64 if [[ "${HARDWARE_AES}" == "yes" ]]; then diff --git a/builds/gnu/install-gnu.sh b/builds/gnu/install-gnu.sh index 266ae50d8..6577f70ce 100755 --- a/builds/gnu/install-gnu.sh +++ b/builds/gnu/install-gnu.sh @@ -419,6 +419,41 @@ main() ARCHTUNE="-march=native -mtune=native" fi + if [[ "${HARDWARE_SHA2}" == "yes" ]]; then + HARDWARE_AES="yes" + fi + + if [[ "${HARDWARE_SHA3}" == "yes" ]]; then + HARDWARE_SHA2="yes" + HARDWARE_AES="yes" + fi + + if [[ "${HARDWARE_AVX2}" == "yes" ]]; then + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_AVX512}" == "yes" ]]; then + HARDWARE_AVX2="yes" + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_AVX512IFMA}" == "yes" ]]; then + HARDWARE_AVX512="yes" + HARDWARE_AVX2="yes" + HARDWARE_SHANI="yes" + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_AVXIFMA}" == "yes" ]]; then + HARDWARE_AVX2="yes" + HARDWARE_SHANI="yes" + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_SHANI}" == "yes" ]]; then + HARDWARE_AESNI="yes" + fi + # Platform options: arm64 if [[ "${HARDWARE_AES}" == "yes" ]]; then