From 75a6a61afd47947deb21eef2b1f63227aad3141f Mon Sep 17 00:00:00 2001 From: Eric Voskuil Date: Tue, 10 Nov 2026 20:58:04 -0500 Subject: [PATCH 1/5] Regenerate artifacts. --- builds/cmake/install-cmake.sh | 56 +++++++++---------- builds/cmake/install-presets.sh | 56 +++++++++---------- builds/gnu/install-gnu.sh | 56 +++++++++---------- builds/msvc/build-msvc.cmd | 28 +++++----- builds/msvc/properties/Win32.props | 10 ++-- builds/msvc/properties/x64.props | 10 ++-- .../vs2026/libbitcoin-system.import.props | 19 ++++++- 7 files changed, 126 insertions(+), 109 deletions(-) diff --git a/builds/cmake/install-cmake.sh b/builds/cmake/install-cmake.sh index 522bf688..41e857ff 100755 --- a/builds/cmake/install-cmake.sh +++ b/builds/cmake/install-cmake.sh @@ -41,22 +41,22 @@ # # Hardware configuration options for arm64: # --hardware-aes Use ARM AES and PMULL Extensions. -# --hardware-sha2 Use ARM SHA1/SHA256 Extensions. -# --hardware-sha3 Use ARM SHA3 Extensions for SHA512. +# --hardware-sha2 Use ARM SHA1/SHA256 Extensions (implies AES). +# --hardware-sha3 Use ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES). # # Hardware configuration options for x64: -# --hardware-avx2 Use Intel AVX2 intrinsics. -# --hardware-avx512 Use Intel AVX512 intrinsics. -# --hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512VL). -# --hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2). -# --hardware-shani Use Intel SHA Extensions. +# --hardware-avx2 Use Intel AVX2 intrinsics (implies AES-NI). +# --hardware-avx512 Use Intel AVX512 intrinsics (implies AVX2 and AES-NI). +# --hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI). +# --hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI). +# --hardware-shani Use Intel SHA Extensions (implies AES-NI). # --hardware-sha512 Use Intel SHA512 Extensions (implies AVX2). # --hardware-sse41 Use SSE4.1 hardware instructions. # --hardware-aesni Use Intel AES-NI and PCLMULQDQ intrinsics. # --hardware-vaes Use Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2). # # Recognized pass-through options: -# -Denable-shani= Add Intel SHA Extensions via compilation options. +# -Denable-shani= Add Intel SHA Extensions (implies AES-NI) via compilation options. # Default: OFF # -Denable-sha512= Add Intel SHA512 Extensions (implies AVX2) via compilation options. # Default: OFF @@ -64,19 +64,19 @@ # Default: OFF # -Denable-vaes= Add Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2) via compilation options. # Default: OFF -# -Denable-avx512ifma= Add Intel AVX512 IFMA intrinsics (implies AVX512VL) via compilation options. +# -Denable-avx512ifma= Add Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI) via compilation options. # Default: OFF -# -Denable-avx512= Add Intel AVX512 intrinsics via compilation options. +# -Denable-avx512= Add Intel AVX512 intrinsics (implies AVX2 and AES-NI) via compilation options. # Default: OFF -# -Denable-avxifma= Add Intel AVX IFMA intrinsics (implies AVX2) via compilation options. +# -Denable-avxifma= Add Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI) via compilation options. # Default: OFF -# -Denable-avx2= Add Intel AVX2 intrinsics via compilation options. +# -Denable-avx2= Add Intel AVX2 intrinsics (implies AES-NI) via compilation options. # Default: OFF # -Denable-sse41= Add SSE4.1 hardware instructions via compilation options. # Default: OFF -# -Denable-sha2= Check for ARM SHA1/SHA256 Extensions. +# -Denable-sha2= Check for ARM SHA1/SHA256 Extensions (implies AES). # Default: OFF -# -Denable-sha3= Check for ARM SHA3 Extensions for SHA512. +# -Denable-sha3= Check for ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES). # Default: OFF # -Denable-aes= Check for ARM AES and PMULL Extensions. # Default: OFF @@ -1054,22 +1054,22 @@ help() msg "" msg "Hardware configuration options for arm64:" msg "--hardware-aes Use ARM AES and PMULL Extensions." - msg "--hardware-sha2 Use ARM SHA1/SHA256 Extensions." - msg "--hardware-sha3 Use ARM SHA3 Extensions for SHA512." + msg "--hardware-sha2 Use ARM SHA1/SHA256 Extensions (implies AES)." + msg "--hardware-sha3 Use ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES)." msg "" msg "Hardware configuration options for x64:" - msg "--hardware-avx2 Use Intel AVX2 intrinsics." - msg "--hardware-avx512 Use Intel AVX512 intrinsics." - msg "--hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512VL)." - msg "--hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2)." - msg "--hardware-shani Use Intel SHA Extensions." + msg "--hardware-avx2 Use Intel AVX2 intrinsics (implies AES-NI)." + msg "--hardware-avx512 Use Intel AVX512 intrinsics (implies AVX2 and AES-NI)." + msg "--hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI)." + msg "--hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI)." + msg "--hardware-shani Use Intel SHA Extensions (implies AES-NI)." msg "--hardware-sha512 Use Intel SHA512 Extensions (implies AVX2)." msg "--hardware-sse41 Use SSE4.1 hardware instructions." msg "--hardware-aesni Use Intel AES-NI and PCLMULQDQ intrinsics." msg "--hardware-vaes Use Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2)." msg "" msg "Recognized pass-through options:" - msg "-Denable-shani= Add Intel SHA Extensions via compilation options." + msg "-Denable-shani= Add Intel SHA Extensions (implies AES-NI) via compilation options." msg " Default: OFF" msg "-Denable-sha512= Add Intel SHA512 Extensions (implies AVX2) via compilation options." msg " Default: OFF" @@ -1077,19 +1077,19 @@ help() msg " Default: OFF" msg "-Denable-vaes= Add Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2) via compilation options." msg " Default: OFF" - msg "-Denable-avx512ifma= Add Intel AVX512 IFMA intrinsics (implies AVX512VL) via compilation options." + msg "-Denable-avx512ifma= Add Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI) via compilation options." msg " Default: OFF" - msg "-Denable-avx512= Add Intel AVX512 intrinsics via compilation options." + msg "-Denable-avx512= Add Intel AVX512 intrinsics (implies AVX2 and AES-NI) via compilation options." msg " Default: OFF" - msg "-Denable-avxifma= Add Intel AVX IFMA intrinsics (implies AVX2) via compilation options." + msg "-Denable-avxifma= Add Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI) via compilation options." msg " Default: OFF" - msg "-Denable-avx2= Add Intel AVX2 intrinsics via compilation options." + msg "-Denable-avx2= Add Intel AVX2 intrinsics (implies AES-NI) via compilation options." msg " Default: OFF" msg "-Denable-sse41= Add SSE4.1 hardware instructions via compilation options." msg " Default: OFF" - msg "-Denable-sha2= Check for ARM SHA1/SHA256 Extensions." + msg "-Denable-sha2= Check for ARM SHA1/SHA256 Extensions (implies AES)." msg " Default: OFF" - msg "-Denable-sha3= Check for ARM SHA3 Extensions for SHA512." + msg "-Denable-sha3= Check for ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES)." msg " Default: OFF" msg "-Denable-aes= Check for ARM AES and PMULL Extensions." msg " Default: OFF" diff --git a/builds/cmake/install-presets.sh b/builds/cmake/install-presets.sh index 313ca69d..3b31f786 100755 --- a/builds/cmake/install-presets.sh +++ b/builds/cmake/install-presets.sh @@ -31,22 +31,22 @@ # # Hardware configuration options for arm64: # --hardware-aes Use ARM AES and PMULL Extensions. -# --hardware-sha2 Use ARM SHA1/SHA256 Extensions. -# --hardware-sha3 Use ARM SHA3 Extensions for SHA512. +# --hardware-sha2 Use ARM SHA1/SHA256 Extensions (implies AES). +# --hardware-sha3 Use ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES). # # Hardware configuration options for x64: -# --hardware-avx2 Use Intel AVX2 intrinsics. -# --hardware-avx512 Use Intel AVX512 intrinsics. -# --hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512VL). -# --hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2). -# --hardware-shani Use Intel SHA Extensions. +# --hardware-avx2 Use Intel AVX2 intrinsics (implies AES-NI). +# --hardware-avx512 Use Intel AVX512 intrinsics (implies AVX2 and AES-NI). +# --hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI). +# --hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI). +# --hardware-shani Use Intel SHA Extensions (implies AES-NI). # --hardware-sha512 Use Intel SHA512 Extensions (implies AVX2). # --hardware-sse41 Use SSE4.1 hardware instructions. # --hardware-aesni Use Intel AES-NI and PCLMULQDQ intrinsics. # --hardware-vaes Use Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2). # # Recognized pass-through options: -# -Denable-shani= Add Intel SHA Extensions via compilation options. +# -Denable-shani= Add Intel SHA Extensions (implies AES-NI) via compilation options. # Default: OFF # -Denable-sha512= Add Intel SHA512 Extensions (implies AVX2) via compilation options. # Default: OFF @@ -54,19 +54,19 @@ # Default: OFF # -Denable-vaes= Add Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2) via compilation options. # Default: OFF -# -Denable-avx512ifma= Add Intel AVX512 IFMA intrinsics (implies AVX512VL) via compilation options. +# -Denable-avx512ifma= Add Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI) via compilation options. # Default: OFF -# -Denable-avx512= Add Intel AVX512 intrinsics via compilation options. +# -Denable-avx512= Add Intel AVX512 intrinsics (implies AVX2 and AES-NI) via compilation options. # Default: OFF -# -Denable-avxifma= Add Intel AVX IFMA intrinsics (implies AVX2) via compilation options. +# -Denable-avxifma= Add Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI) via compilation options. # Default: OFF -# -Denable-avx2= Add Intel AVX2 intrinsics via compilation options. +# -Denable-avx2= Add Intel AVX2 intrinsics (implies AES-NI) via compilation options. # Default: OFF # -Denable-sse41= Add SSE4.1 hardware instructions via compilation options. # Default: OFF -# -Denable-sha2= Check for ARM SHA1/SHA256 Extensions. +# -Denable-sha2= Check for ARM SHA1/SHA256 Extensions (implies AES). # Default: OFF -# -Denable-sha3= Check for ARM SHA3 Extensions for SHA512. +# -Denable-sha3= Check for ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES). # Default: OFF # -Denable-aes= Check for ARM AES and PMULL Extensions. # Default: OFF @@ -1125,22 +1125,22 @@ help() msg "" msg "Hardware configuration options for arm64:" msg "--hardware-aes Use ARM AES and PMULL Extensions." - msg "--hardware-sha2 Use ARM SHA1/SHA256 Extensions." - msg "--hardware-sha3 Use ARM SHA3 Extensions for SHA512." + msg "--hardware-sha2 Use ARM SHA1/SHA256 Extensions (implies AES)." + msg "--hardware-sha3 Use ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES)." msg "" msg "Hardware configuration options for x64:" - msg "--hardware-avx2 Use Intel AVX2 intrinsics." - msg "--hardware-avx512 Use Intel AVX512 intrinsics." - msg "--hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512VL)." - msg "--hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2)." - msg "--hardware-shani Use Intel SHA Extensions." + msg "--hardware-avx2 Use Intel AVX2 intrinsics (implies AES-NI)." + msg "--hardware-avx512 Use Intel AVX512 intrinsics (implies AVX2 and AES-NI)." + msg "--hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI)." + msg "--hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI)." + msg "--hardware-shani Use Intel SHA Extensions (implies AES-NI)." msg "--hardware-sha512 Use Intel SHA512 Extensions (implies AVX2)." msg "--hardware-sse41 Use SSE4.1 hardware instructions." msg "--hardware-aesni Use Intel AES-NI and PCLMULQDQ intrinsics." msg "--hardware-vaes Use Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2)." msg "" msg "Recognized pass-through options:" - msg "-Denable-shani= Add Intel SHA Extensions via compilation options." + msg "-Denable-shani= Add Intel SHA Extensions (implies AES-NI) via compilation options." msg " Default: OFF" msg "-Denable-sha512= Add Intel SHA512 Extensions (implies AVX2) via compilation options." msg " Default: OFF" @@ -1148,19 +1148,19 @@ help() msg " Default: OFF" msg "-Denable-vaes= Add Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2) via compilation options." msg " Default: OFF" - msg "-Denable-avx512ifma= Add Intel AVX512 IFMA intrinsics (implies AVX512VL) via compilation options." + msg "-Denable-avx512ifma= Add Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI) via compilation options." msg " Default: OFF" - msg "-Denable-avx512= Add Intel AVX512 intrinsics via compilation options." + msg "-Denable-avx512= Add Intel AVX512 intrinsics (implies AVX2 and AES-NI) via compilation options." msg " Default: OFF" - msg "-Denable-avxifma= Add Intel AVX IFMA intrinsics (implies AVX2) via compilation options." + msg "-Denable-avxifma= Add Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI) via compilation options." msg " Default: OFF" - msg "-Denable-avx2= Add Intel AVX2 intrinsics via compilation options." + msg "-Denable-avx2= Add Intel AVX2 intrinsics (implies AES-NI) via compilation options." msg " Default: OFF" msg "-Denable-sse41= Add SSE4.1 hardware instructions via compilation options." msg " Default: OFF" - msg "-Denable-sha2= Check for ARM SHA1/SHA256 Extensions." + msg "-Denable-sha2= Check for ARM SHA1/SHA256 Extensions (implies AES)." msg " Default: OFF" - msg "-Denable-sha3= Check for ARM SHA3 Extensions for SHA512." + msg "-Denable-sha3= Check for ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES)." msg " Default: OFF" msg "-Denable-aes= Check for ARM AES and PMULL Extensions." msg " Default: OFF" diff --git a/builds/gnu/install-gnu.sh b/builds/gnu/install-gnu.sh index 47a2d457..0fdf0727 100755 --- a/builds/gnu/install-gnu.sh +++ b/builds/gnu/install-gnu.sh @@ -42,22 +42,22 @@ # # Hardware configuration options for arm64: # --hardware-aes Use ARM AES and PMULL Extensions. -# --hardware-sha2 Use ARM SHA1/SHA256 Extensions. -# --hardware-sha3 Use ARM SHA3 Extensions for SHA512. +# --hardware-sha2 Use ARM SHA1/SHA256 Extensions (implies AES). +# --hardware-sha3 Use ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES). # # Hardware configuration options for x64: -# --hardware-avx2 Use Intel AVX2 intrinsics. -# --hardware-avx512 Use Intel AVX512 intrinsics. -# --hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512VL). -# --hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2). -# --hardware-shani Use Intel SHA Extensions. +# --hardware-avx2 Use Intel AVX2 intrinsics (implies AES-NI). +# --hardware-avx512 Use Intel AVX512 intrinsics (implies AVX2 and AES-NI). +# --hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI). +# --hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI). +# --hardware-shani Use Intel SHA Extensions (implies AES-NI). # --hardware-sha512 Use Intel SHA512 Extensions (implies AVX2). # --hardware-sse41 Use SSE4.1 hardware instructions. # --hardware-aesni Use Intel AES-NI and PCLMULQDQ intrinsics. # --hardware-vaes Use Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2). # # Recognized pass-through options: -# ---shani Add Intel SHA Extensions via compilation options. +# ---shani Add Intel SHA Extensions (implies AES-NI) via compilation options. # Default: --disable-shani # ---sha512 Add Intel SHA512 Extensions (implies AVX2) via compilation options. # Default: --disable-sha512 @@ -65,19 +65,19 @@ # Default: --disable-aesni # ---vaes Add Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2) via compilation options. # Default: --disable-vaes -# ---avx512ifma Add Intel AVX512 IFMA intrinsics (implies AVX512VL) via compilation options. +# ---avx512ifma Add Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI) via compilation options. # Default: --disable-avx512ifma -# ---avx512 Add Intel AVX512 intrinsics via compilation options. +# ---avx512 Add Intel AVX512 intrinsics (implies AVX2 and AES-NI) via compilation options. # Default: --disable-avx512 -# ---avxifma Add Intel AVX IFMA intrinsics (implies AVX2) via compilation options. +# ---avxifma Add Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI) via compilation options. # Default: --disable-avxifma -# ---avx2 Add Intel AVX2 intrinsics via compilation options. +# ---avx2 Add Intel AVX2 intrinsics (implies AES-NI) via compilation options. # Default: --disable-avx2 # ---sse41 Add SSE4.1 hardware instructions via compilation options. # Default: --disable-sse41 -# ---sha2 Check for ARM SHA1/SHA256 Extensions. +# ---sha2 Check for ARM SHA1/SHA256 Extensions (implies AES). # Default: --disable-sha2 -# ---sha3 Check for ARM SHA3 Extensions for SHA512. +# ---sha3 Check for ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES). # Default: --disable-sha3 # ---aes Check for ARM AES and PMULL Extensions. # Default: --disable-aes @@ -1128,22 +1128,22 @@ help() msg "" msg "Hardware configuration options for arm64:" msg "--hardware-aes Use ARM AES and PMULL Extensions." - msg "--hardware-sha2 Use ARM SHA1/SHA256 Extensions." - msg "--hardware-sha3 Use ARM SHA3 Extensions for SHA512." + msg "--hardware-sha2 Use ARM SHA1/SHA256 Extensions (implies AES)." + msg "--hardware-sha3 Use ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES)." msg "" msg "Hardware configuration options for x64:" - msg "--hardware-avx2 Use Intel AVX2 intrinsics." - msg "--hardware-avx512 Use Intel AVX512 intrinsics." - msg "--hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512VL)." - msg "--hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2)." - msg "--hardware-shani Use Intel SHA Extensions." + msg "--hardware-avx2 Use Intel AVX2 intrinsics (implies AES-NI)." + msg "--hardware-avx512 Use Intel AVX512 intrinsics (implies AVX2 and AES-NI)." + msg "--hardware-avx512ifma Use Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI)." + msg "--hardware-avxifma Use Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI)." + msg "--hardware-shani Use Intel SHA Extensions (implies AES-NI)." msg "--hardware-sha512 Use Intel SHA512 Extensions (implies AVX2)." msg "--hardware-sse41 Use SSE4.1 hardware instructions." msg "--hardware-aesni Use Intel AES-NI and PCLMULQDQ intrinsics." msg "--hardware-vaes Use Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2)." msg "" msg "Recognized pass-through options:" - msg "---shani Add Intel SHA Extensions via compilation options." + msg "---shani Add Intel SHA Extensions (implies AES-NI) via compilation options." msg " Default: --disable-shani" msg "---sha512 Add Intel SHA512 Extensions (implies AVX2) via compilation options." msg " Default: --disable-sha512" @@ -1151,19 +1151,19 @@ help() msg " Default: --disable-aesni" msg "---vaes Add Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2) via compilation options." msg " Default: --disable-vaes" - msg "---avx512ifma Add Intel AVX512 IFMA intrinsics (implies AVX512VL) via compilation options." + msg "---avx512ifma Add Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI) via compilation options." msg " Default: --disable-avx512ifma" - msg "---avx512 Add Intel AVX512 intrinsics via compilation options." + msg "---avx512 Add Intel AVX512 intrinsics (implies AVX2 and AES-NI) via compilation options." msg " Default: --disable-avx512" - msg "---avxifma Add Intel AVX IFMA intrinsics (implies AVX2) via compilation options." + msg "---avxifma Add Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI) via compilation options." msg " Default: --disable-avxifma" - msg "---avx2 Add Intel AVX2 intrinsics via compilation options." + msg "---avx2 Add Intel AVX2 intrinsics (implies AES-NI) via compilation options." msg " Default: --disable-avx2" msg "---sse41 Add SSE4.1 hardware instructions via compilation options." msg " Default: --disable-sse41" - msg "---sha2 Check for ARM SHA1/SHA256 Extensions." + msg "---sha2 Check for ARM SHA1/SHA256 Extensions (implies AES)." msg " Default: --disable-sha2" - msg "---sha3 Check for ARM SHA3 Extensions for SHA512." + msg "---sha3 Check for ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES)." msg " Default: --disable-sha3" msg "---aes Check for ARM AES and PMULL Extensions." msg " Default: --disable-aes" diff --git a/builds/msvc/build-msvc.cmd b/builds/msvc/build-msvc.cmd index 35fa5074..041d33e7 100644 --- a/builds/msvc/build-msvc.cmd +++ b/builds/msvc/build-msvc.cmd @@ -11,17 +11,17 @@ REM ########################################################################### REM Script managing the build of libbitcoin-node. REM REM Script options: -REM --enable-shani Add Intel SHA Extensions via compilation options. +REM --enable-shani Add Intel SHA Extensions (implies AES-NI) via compilation options. REM --enable-sha512 Add Intel SHA512 Extensions (implies AVX2) via compilation options. REM --enable-aesni Add Intel AES-NI and PCLMULQDQ intrinsics via compilation options. REM --enable-vaes Add Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2) via compilation options. -REM --enable-avx512ifma Add Intel AVX512 IFMA intrinsics (implies AVX512VL) via compilation options. -REM --enable-avx512 Add Intel AVX512 intrinsics via compilation options. -REM --enable-avxifma Add Intel AVX IFMA intrinsics (implies AVX2) via compilation options. -REM --enable-avx2 Add Intel AVX2 intrinsics via compilation options. +REM --enable-avx512ifma Add Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI) via compilation options. +REM --enable-avx512 Add Intel AVX512 intrinsics (implies AVX2 and AES-NI) via compilation options. +REM --enable-avxifma Add Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI) via compilation options. +REM --enable-avx2 Add Intel AVX2 intrinsics (implies AES-NI) via compilation options. REM --enable-sse41 Add SSE4.1 hardware instructions via compilation options. -REM --enable-sha2 Check for ARM SHA1/SHA256 Extensions. -REM --enable-sha3 Check for ARM SHA3 Extensions for SHA512. +REM --enable-sha2 Check for ARM SHA1/SHA256 Extensions (implies AES). +REM --enable-sha3 Check for ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES). REM --enable-aes Check for ARM AES and PMULL Extensions. REM --build-config config Build configuration. REM --build-platform platform Build platform. @@ -585,17 +585,17 @@ if "!libbitcoin_node_TAG!" == "" ( call :msg "Script managing the build of libbitcoin-node." call :msg "" call :msg "Script options:" - call :msg "--enable-shani Add Intel SHA Extensions via compilation options." + call :msg "--enable-shani Add Intel SHA Extensions (implies AES-NI) via compilation options." call :msg "--enable-sha512 Add Intel SHA512 Extensions (implies AVX2) via compilation options." call :msg "--enable-aesni Add Intel AES-NI and PCLMULQDQ intrinsics via compilation options." call :msg "--enable-vaes Add Intel VAES and VPCLMULQDQ intrinsics (implies AES-NI and AVX2) via compilation options." - call :msg "--enable-avx512ifma Add Intel AVX512 IFMA intrinsics (implies AVX512VL) via compilation options." - call :msg "--enable-avx512 Add Intel AVX512 intrinsics via compilation options." - call :msg "--enable-avxifma Add Intel AVX IFMA intrinsics (implies AVX2) via compilation options." - call :msg "--enable-avx2 Add Intel AVX2 intrinsics via compilation options." + call :msg "--enable-avx512ifma Add Intel AVX512 IFMA intrinsics (implies AVX512, SHA Extensions and AES-NI) via compilation options." + call :msg "--enable-avx512 Add Intel AVX512 intrinsics (implies AVX2 and AES-NI) via compilation options." + call :msg "--enable-avxifma Add Intel AVX IFMA intrinsics (implies AVX2, SHA Extensions and AES-NI) via compilation options." + call :msg "--enable-avx2 Add Intel AVX2 intrinsics (implies AES-NI) via compilation options." call :msg "--enable-sse41 Add SSE4.1 hardware instructions via compilation options." - call :msg "--enable-sha2 Check for ARM SHA1/SHA256 Extensions." - call :msg "--enable-sha3 Check for ARM SHA3 Extensions for SHA512." + call :msg "--enable-sha2 Check for ARM SHA1/SHA256 Extensions (implies AES)." + call :msg "--enable-sha3 Check for ARM SHA3 Extensions for SHA512 (implies SHA1/SHA256 and AES)." call :msg "--enable-aes Check for ARM AES and PMULL Extensions." call :msg "--build-config config Build configuration." call :msg "--build-platform platform Build platform." diff --git a/builds/msvc/properties/Win32.props b/builds/msvc/properties/Win32.props index 87131810..edd208ac 100644 --- a/builds/msvc/properties/Win32.props +++ b/builds/msvc/properties/Win32.props @@ -15,11 +15,11 @@ WIN32;_WIN32;%(PreprocessorDefinitions) - StreamingSIMDExtensions - StreamingSIMDExtensions2 - AdvancedVectorExtensions - AdvancedVectorExtensions2 - AdvancedVectorExtensions512 + StreamingSIMDExtensions + StreamingSIMDExtensions2 + AdvancedVectorExtensions + AdvancedVectorExtensions2 + AdvancedVectorExtensions512 MachineX86 diff --git a/builds/msvc/properties/x64.props b/builds/msvc/properties/x64.props index 1ec028cc..dd4f7ad5 100644 --- a/builds/msvc/properties/x64.props +++ b/builds/msvc/properties/x64.props @@ -15,11 +15,11 @@ WIN32;_WIN32;WIN64;_WIN64;%(PreprocessorDefinitions) - StreamingSIMDExtensions - StreamingSIMDExtensions2 - AdvancedVectorExtensions - AdvancedVectorExtensions2 - AdvancedVectorExtensions512 + StreamingSIMDExtensions + StreamingSIMDExtensions2 + AdvancedVectorExtensions + AdvancedVectorExtensions2 + AdvancedVectorExtensions512 MachineX64 diff --git a/builds/msvc/vs2026/libbitcoin-system.import.props b/builds/msvc/vs2026/libbitcoin-system.import.props index 480ed3d0..37430d09 100644 --- a/builds/msvc/vs2026/libbitcoin-system.import.props +++ b/builds/msvc/vs2026/libbitcoin-system.import.props @@ -30,8 +30,24 @@ false + + true + true + true + true + true + true + true + true + true + true + true + true + true + true + + - AdvancedVectorExtensions AdvancedVectorExtensions2 AdvancedVectorExtensions512 @@ -44,6 +60,7 @@ WITH_AVXIFMA;%(PreprocessorDefinitions) WITH_SHANI;%(PreprocessorDefinitions) WITH_SHA512;%(PreprocessorDefinitions) + WITH_SSE41;%(PreprocessorDefinitions) WITH_AESNI;%(PreprocessorDefinitions) WITH_VAES;%(PreprocessorDefinitions) WITH_AES;%(PreprocessorDefinitions) From 87155fe4a89cec36c5fe992adc1825b594ed8eb3 Mon Sep 17 00:00:00 2001 From: Eric Voskuil Date: Tue, 10 Nov 2026 21:32:09 -0500 Subject: [PATCH 2/5] Brace macro invocations under conditionals. --- src/chasers/chaser_validate.cpp | 8 ++++++++ src/protocols/protocol_transaction_out_60002.cpp | 2 ++ 2 files changed, 10 insertions(+) diff --git a/src/chasers/chaser_validate.cpp b/src/chasers/chaser_validate.cpp index eb72532f..8b06e7c5 100644 --- a/src/chasers/chaser_validate.cpp +++ b/src/chasers/chaser_validate.cpp @@ -60,16 +60,24 @@ code chaser_validate::start() NOEXCEPT !node_settings().use_gpu ? "gpu disabled" : "no gpu"; if (node_settings().batch_verify_enabled() && !verify_enabled_) + { LOGN("Signature batching disabled (" << reason << ")."); + } if (node_settings().batch_silent_enabled() && !silent_enabled_) + { LOGN("Silent batching disabled (" << reason << ")."); + } if (verify_enabled_ && !gpu_) + { LOGN("Signature batching on the cpu (" << reason << ")."); + } if (silent_enabled_ && !gpu_) + { LOGN("Silent batching on the cpu (" << reason << ")."); + } set_position(archive().get_fork()); if (const auto ec = start_batch()) diff --git a/src/protocols/protocol_transaction_out_60002.cpp b/src/protocols/protocol_transaction_out_60002.cpp index 35f08b08..66d9f7d6 100644 --- a/src/protocols/protocol_transaction_out_60002.cpp +++ b/src/protocols/protocol_transaction_out_60002.cpp @@ -44,7 +44,9 @@ void protocol_transaction_out_60002::start() NOEXCEPT return; if (enable_memory_pool_) + { SUBSCRIBE_CHANNEL(memory_pool, handle_receive_memory_pool, _1, _2); + } protocol_transaction_out_106::start(); } From f3ef7d72aa91b3857936813c21895ae430b1167b Mon Sep 17 00:00:00 2001 From: Eric Voskuil Date: Wed, 11 Nov 2026 01:30:10 -0500 Subject: [PATCH 3/5] Change fee default to on. --- src/settings.cpp | 2 +- test/settings.cpp | 6 +++--- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/settings.cpp b/src/settings.cpp index a901a3a0..691920ba 100644 --- a/src/settings.cpp +++ b/src/settings.cpp @@ -50,7 +50,7 @@ settings::settings() NOEXCEPT batch_verify{ 1'000'000 }, batch_silent{ 1'000'000 }, current_connections{ 10 }, - fee_estimate_horizon{ 0 }, + fee_estimate_horizon{ 1008 }, ////snapshot_bytes{ 200'000'000'000 }, ////snapshot_valid{ 250'000 }, ////snapshot_confirm{ 500'000 }, diff --git a/test/settings.cpp b/test/settings.cpp index 3376e888..23a9e0ea 100644 --- a/test/settings.cpp +++ b/test/settings.cpp @@ -52,7 +52,7 @@ BC_AUTO_TEST_CASE(settings__node__default_context__expected) BC_REQUIRE_EQUAL(node.batch_verify, 1'000'000_u64); BC_REQUIRE_EQUAL(node.batch_silent, 1'000'000_u64); BC_REQUIRE_EQUAL(node.current_connections, 10_u16); - BC_REQUIRE_EQUAL(node.fee_estimate_horizon, 0u); + BC_REQUIRE_EQUAL(node.fee_estimate_horizon, 1008u); BC_REQUIRE_EQUAL(node.maximum_height, 0_u32); BC_REQUIRE_EQUAL(node.maximum_height_(), max_size_t); BC_REQUIRE_EQUAL(node.silent_start_height, 0xffffffff_u32); @@ -69,8 +69,8 @@ BC_AUTO_TEST_CASE(settings__node__default_context__expected) BC_REQUIRE_EQUAL(node.threads_(), cores()); BC_REQUIRE_EQUAL(node.maximum_height_(), max_size_t); BC_REQUIRE_EQUAL(node.maximum_concurrency_(), 50'000_size); - BC_REQUIRE_EQUAL(node.fee_estimate_horizon_(), 0_size); - BC_REQUIRE(!node.fee_estimate_enabled()); + BC_REQUIRE_EQUAL(node.fee_estimate_horizon_(), 1008_size); + BC_REQUIRE(node.fee_estimate_enabled()); BC_REQUIRE_EQUAL(node.use_gpu_(), system::batched::accelerated()); BC_REQUIRE(node.batch_verify_enabled()); BC_REQUIRE(node.batch_silent_enabled()); From ece3f96320e1fd5e65bc3b8310cf39357e1288a2 Mon Sep 17 00:00:00 2001 From: Eric Voskuil Date: Wed, 11 Nov 2026 01:20:59 -0500 Subject: [PATCH 4/5] Regenerate install scripts. --- builds/cmake/install-cmake.sh | 35 +++++++++++++++++++++++++++++++++ builds/cmake/install-presets.sh | 35 +++++++++++++++++++++++++++++++++ builds/gnu/install-gnu.sh | 35 +++++++++++++++++++++++++++++++++ 3 files changed, 105 insertions(+) diff --git a/builds/cmake/install-cmake.sh b/builds/cmake/install-cmake.sh index 41e857ff..31f2c16b 100755 --- a/builds/cmake/install-cmake.sh +++ b/builds/cmake/install-cmake.sh @@ -428,6 +428,41 @@ main() ARCHTUNE="-march=native -mtune=native" fi + if [[ "${HARDWARE_SHA2}" == "yes" ]]; then + HARDWARE_AES="yes" + fi + + if [[ "${HARDWARE_SHA3}" == "yes" ]]; then + HARDWARE_SHA2="yes" + HARDWARE_AES="yes" + fi + + if [[ "${HARDWARE_AVX2}" == "yes" ]]; then + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_AVX512}" == "yes" ]]; then + HARDWARE_AVX2="yes" + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_AVX512IFMA}" == "yes" ]]; then + HARDWARE_AVX512="yes" + HARDWARE_AVX2="yes" + HARDWARE_SHANI="yes" + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_AVXIFMA}" == "yes" ]]; then + HARDWARE_AVX2="yes" + HARDWARE_SHANI="yes" + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_SHANI}" == "yes" ]]; then + HARDWARE_AESNI="yes" + fi + # Platform options: arm64 if [[ "${HARDWARE_AES}" == "yes" ]]; then diff --git a/builds/cmake/install-presets.sh b/builds/cmake/install-presets.sh index 3b31f786..db01a8b9 100755 --- a/builds/cmake/install-presets.sh +++ b/builds/cmake/install-presets.sh @@ -476,6 +476,41 @@ main() ARCHTUNE="-march=native -mtune=native" fi + if [[ "${HARDWARE_SHA2}" == "yes" ]]; then + HARDWARE_AES="yes" + fi + + if [[ "${HARDWARE_SHA3}" == "yes" ]]; then + HARDWARE_SHA2="yes" + HARDWARE_AES="yes" + fi + + if [[ "${HARDWARE_AVX2}" == "yes" ]]; then + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_AVX512}" == "yes" ]]; then + HARDWARE_AVX2="yes" + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_AVX512IFMA}" == "yes" ]]; then + HARDWARE_AVX512="yes" + HARDWARE_AVX2="yes" + HARDWARE_SHANI="yes" + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_AVXIFMA}" == "yes" ]]; then + HARDWARE_AVX2="yes" + HARDWARE_SHANI="yes" + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_SHANI}" == "yes" ]]; then + HARDWARE_AESNI="yes" + fi + # Platform options: arm64 if [[ "${HARDWARE_AES}" == "yes" ]]; then diff --git a/builds/gnu/install-gnu.sh b/builds/gnu/install-gnu.sh index 0fdf0727..2a261174 100755 --- a/builds/gnu/install-gnu.sh +++ b/builds/gnu/install-gnu.sh @@ -433,6 +433,41 @@ main() ARCHTUNE="-march=native -mtune=native" fi + if [[ "${HARDWARE_SHA2}" == "yes" ]]; then + HARDWARE_AES="yes" + fi + + if [[ "${HARDWARE_SHA3}" == "yes" ]]; then + HARDWARE_SHA2="yes" + HARDWARE_AES="yes" + fi + + if [[ "${HARDWARE_AVX2}" == "yes" ]]; then + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_AVX512}" == "yes" ]]; then + HARDWARE_AVX2="yes" + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_AVX512IFMA}" == "yes" ]]; then + HARDWARE_AVX512="yes" + HARDWARE_AVX2="yes" + HARDWARE_SHANI="yes" + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_AVXIFMA}" == "yes" ]]; then + HARDWARE_AVX2="yes" + HARDWARE_SHANI="yes" + HARDWARE_AESNI="yes" + fi + + if [[ "${HARDWARE_SHANI}" == "yes" ]]; then + HARDWARE_AESNI="yes" + fi + # Platform options: arm64 if [[ "${HARDWARE_AES}" == "yes" ]]; then From fc3d21e28f64decfd52041eb7c0c4d0862c3ce81 Mon Sep 17 00:00:00 2001 From: Eric Voskuil Date: Wed, 11 Nov 2026 02:00:34 -0500 Subject: [PATCH 5/5] Update fee default test. --- test/test.cpp | 1 + 1 file changed, 1 insertion(+) diff --git a/test/test.cpp b/test/test.cpp index 6815be65..d0d4cd58 100644 --- a/test/test.cpp +++ b/test/test.cpp @@ -186,6 +186,7 @@ node::settings node_settings() NOEXCEPT out.network = system::chain::selection::mainnet; out.batch_verify = 0; out.batch_silent = 0; + out.fee_estimate_horizon = 0; out.minimum_fee_rate = 0.0; out.maximum_concurrency = 50'000; return out;