From e434d51236414cc7fd08a9e2386a25c5fd49dff2 Mon Sep 17 00:00:00 2001 From: Kareem Date: Fri, 30 Oct 2026 13:32:04 -0700 Subject: [PATCH] Fix AVX512 Visual Studio assembly build. --- wolfcrypt/src/chacha_asm.asm | 6 ++--- wolfcrypt/src/poly1305_asm.asm | 20 +++++++-------- wolfssl-VS2022.vcxproj | 47 +++++++++++++++++++--------------- wolfssl.vcxproj | 47 +++++++++++++++++++--------------- 4 files changed, 67 insertions(+), 53 deletions(-) diff --git a/wolfcrypt/src/chacha_asm.asm b/wolfcrypt/src/chacha_asm.asm index 1a4ef91bbd8..5cb2ce3747b 100644 --- a/wolfcrypt/src/chacha_asm.asm +++ b/wolfcrypt/src/chacha_asm.asm @@ -4817,7 +4817,7 @@ L_chacha20_poly1305_epilogue: vmovdqu YMMWORD PTR [r9+64], ymm2 vmovdqu YMMWORD PTR [r9+96], ymm3 vmovdqu YMMWORD PTR [r9+128], ymm4 - vmovd [rdi+48], xmm28 + vmovd DWORD PTR [rdi+48], xmm28 vzeroupper vmovdqu xmm6, OWORD PTR [rsp+728] vmovdqu xmm7, OWORD PTR [rsp+744] @@ -8191,7 +8191,7 @@ L_cp512_epi: mov QWORD PTR [rsi+24], r8 mov QWORD PTR [rsi+32], r10 mov QWORD PTR [rsi+40], r11 - vmovd [rdi+48], xmm12 + vmovd DWORD PTR [rdi+48], xmm12 vzeroupper vmovdqu xmm6, OWORD PTR [rsp+1200] vmovdqu xmm7, OWORD PTR [rsp+1216] @@ -9954,7 +9954,7 @@ L_cp512_dstart: mov QWORD PTR [rsi+24], r8 mov QWORD PTR [rsi+32], r10 mov QWORD PTR [rsi+40], r11 - vmovd [rdi+48], xmm12 + vmovd DWORD PTR [rdi+48], xmm12 vzeroupper vmovdqu xmm6, OWORD PTR [rsp+1200] vmovdqu xmm7, OWORD PTR [rsp+1216] diff --git a/wolfcrypt/src/poly1305_asm.asm b/wolfcrypt/src/poly1305_asm.asm index 0ff0d144f7b..a61a2d498f1 100644 --- a/wolfcrypt/src/poly1305_asm.asm +++ b/wolfcrypt/src/poly1305_asm.asm @@ -1803,11 +1803,11 @@ poly1305_blocks_avx512 PROC jmp L_poly1305_avx512_blocks_load_r8 L_poly1305_avx512_blocks_begin_h: ; Load the H values. - vpmovzxdq zmm0, [rax] - vpmovzxdq zmm1, [rax+32] - vpmovzxdq zmm2, [rax+64] - vpmovzxdq zmm3, [rax+96] - vpmovzxdq zmm4, [rax+128] + vpmovzxdq zmm0, YMMWORD PTR [rax] + vpmovzxdq zmm1, YMMWORD PTR [rax+32] + vpmovzxdq zmm2, YMMWORD PTR [rax+64] + vpmovzxdq zmm3, YMMWORD PTR [rax+96] + vpmovzxdq zmm4, YMMWORD PTR [rax+128] ; Check if there is a power of r to load - otherwise use r^8. cmp BYTE PTR [rdi+616], 0 je L_poly1305_avx512_blocks_load_r8 @@ -2076,11 +2076,11 @@ L_poly1305_avx512_blocks_start: jnz L_poly1305_avx512_blocks_start L_poly1305_avx512_blocks_store: ; Store eight H values - state - vpmovqd [rax], zmm0 - vpmovqd [rax+32], zmm1 - vpmovqd [rax+64], zmm2 - vpmovqd [rax+96], zmm3 - vpmovqd [rax+128], zmm4 + vpmovqd YMMWORD PTR [rax], zmm0 + vpmovqd YMMWORD PTR [rax+32], zmm1 + vpmovqd YMMWORD PTR [rax+64], zmm2 + vpmovqd YMMWORD PTR [rax+96], zmm3 + vpmovqd YMMWORD PTR [rax+128], zmm4 L_poly1305_avx512_blocks_end_calc: cmp BYTE PTR [rdi+616], 0 je L_poly1305_avx512_blocks_complete diff --git a/wolfssl-VS2022.vcxproj b/wolfssl-VS2022.vcxproj index cf58486531f..1c9323be56a 100644 --- a/wolfssl-VS2022.vcxproj +++ b/wolfssl-VS2022.vcxproj @@ -75,6 +75,13 @@ default (pure C). Enable on an x64 build with: msbuild /p:WolfSSLIntelAsm=true --> false + + /DHAVE_INTEL_AVX512 /DHAVE_INTEL_VAES false + + /DHAVE_INTEL_AVX512 /DHAVE_INTEL_VAES