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x86: decode reserved PREFETCH encodings - #3136

Merged
Rot127 merged 1 commit into
capstone-engine:nextfrom
raaller:fix/x86-prefetch-reserved-2566
Oct 24, 2026
Merged

Rot127 merged 1 commit into
capstone-engine:nextfrom
raaller:fix/x86-prefetch-reserved-2566

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@raaller

@raaller raaller commented Oct 22, 2026

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Your checklist for this pull request

  • I've documented or updated the documentation of every API function and struct this PR changes.
  • I've added tests that prove my fix is effective or that my feature works (if possible)

Detailed description

Decode reserved 0F 0D /4–/7 memory encodings as PREFETCH, preserving the original ModR/M byte.

Test plan

Added 4 regression cases covering 16/32/64-bit modes, prefixes, addressing, and invalid register operands

Closing issues

Closes #2566

@github-actions github-actions Bot added the X86 Arch label Oct 22, 2026
@codecov

codecov Bot commented Oct 22, 2026

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Codecov Report

✅ All modified and coverable lines are covered by tests.
⚠️ Please upload report for BASE (next@2b4a940). Learn more about missing BASE report.

Additional details and impacted files
@@           Coverage Diff           @@
##             next    #3136   +/-   ##
=======================================
  Coverage        ?   61.44%           
=======================================
  Files           ?      243           
  Lines           ?    56817           
  Branches        ?    10077           
=======================================
  Hits            ?    34913           
  Misses          ?    16708           
  Partials        ?     5196           

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@Rot127
Rot127 merged commit 901a483 into capstone-engine:next Oct 24, 2026
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[X86] Disassembly Error, failed to decode prefetch instruction

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