[embhorn]

Description

The binary to text conversion latched after the first zero group and dropped every later zero group, so an address with two zero runs such as 2001:db8:0:1::5 was stored as 2001:db8::1:5. Identity checks then matched the wrong address and rejected the correct one.

Render the address per RFC 5952: compress only the first longest run of two or more zero groups, write other zero groups as 0, and bound every write against the remaining buffer.

Fixes zd22726

Testing

Add regression cases with multiple zero runs.

Checklist

• added tests
• updated/added doxygen
• updated appropriate READMEs
• Updated manual and documentation

[Copilot]

🟢 Approval recommended

No active review issues remain for the change correcting IPv6 address rendering in certificate identity checks.

No open issues 🎉

What changed in this PR

Fixes IPv6 text rendering in X509_VERIFY_PARAM_set1_ip so certificate identity checks use the intended address when it contains multiple zero runs.

Changes:

• Compresses only the first longest run of two or more zero groups, preserving all other groups.
• Bounds formatted writes by the remaining buffer capacity and checks for truncation.
• Adds regression cases for multiple zero runs, tied runs, isolated zeros, and all-zero addresses.

File	Description
tests/​api/​test_ossl_x509_vp.c	Adds IPv6 rendering regression cases with expected text output.
src/​x509.c	Corrects zero-run compression and validates bounded buffer writes.

_{Review effort: Balanced}

[github-actions]

MemBrowse Memory Report · Explore what changed →

zephyr-frdm_rw612

• FLASH: log_const_area -8 B, rodata -8 B, text +1,600 B (+0.6%, 284,048 B / 67,108,864 B, total: 0% used)

No memory changes detected for:

• gcc-arm-cortex-m0plus
• gcc-arm-cortex-m3
• gcc-arm-cortex-m4
• gcc-arm-cortex-m4-baremetal
• gcc-arm-cortex-m4-crypto-only
• gcc-arm-cortex-m4-dtls13
• gcc-arm-cortex-m4-min-ecc
• gcc-arm-cortex-m4-openssl-compat
• gcc-arm-cortex-m4-pkcs7
• gcc-arm-cortex-m4-pq
• gcc-arm-cortex-m4-rsa-only
• gcc-arm-cortex-m4-sp-math
• gcc-arm-cortex-m4-tls12
• gcc-arm-cortex-m4-tls13
• gcc-arm-cortex-m7
• gcc-arm-cortex-m7-pq
• gcc-arm-cortex-m7-tls13
• stm32-sim-stm32h753

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[embhorn]

Fix confirmed by customer