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fix( #1375 ): under-aligned buffers in large-arg range reduction#1377

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serge-sans-paille merged 1 commit into
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DiamonDinoia:repro/armhf-complex-pow-align
Jul 9, 2026
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fix( #1375 ): under-aligned buffers in large-arg range reduction#1377
serge-sans-paille merged 1 commit into
xtensor-stack:masterfrom
DiamonDinoia:repro/armhf-complex-pow-align

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The generic trigonometric range-reduction kernel stored the batch into std::array buffers declared alignas(B). alignof(B) equals the alignment of the underlying SIMD register, which on some ABIs is smaller than the alignment store_aligned/load_aligned require (A::alignment()). On armhf NEON alignof(batch) is 8 while neon::alignment() is 16, so the buffer was only 8-byte aligned and store_aligned tripped its alignment assertion whenever the stack happened to place it at an 8-mod-16 address.

This is exactly what broke the Debian armhf build of 14.2.0 (test '[complex power] pow real complex' -> SIGABRT in store_aligned).

@DiamonDinoia DiamonDinoia linked an issue Jul 9, 2026 that may be closed by this pull request
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<3
I grepped for any other occurence and you covered all of them.

Comment thread include/xsimd/arch/common/xsimd_common_trigo.hpp Outdated
The generic trigonometric range-reduction kernel stored the batch into
std::array buffers declared alignas(B). alignof(B) equals the alignment of
the underlying SIMD register, which on some ABIs is smaller than the
alignment store_aligned/load_aligned require (A::alignment()). On armhf NEON
alignof(batch<float>) is 8 while neon::alignment() is 16, so the buffer was
only 8-byte aligned and store_aligned tripped its alignment assertion
whenever the stack happened to place it at an 8-mod-16 address.

This is exactly what broke the Debian armhf build of 14.2.0 (test
'[complex power] pow real complex' -> SIGABRT in store_aligned).

Align the buffers to B::arch_type::alignment() instead, matching the
convention used by every other internal store_aligned buffer.
@DiamonDinoia DiamonDinoia force-pushed the repro/armhf-complex-pow-align branch from 4722cf4 to d7b6ba1 Compare July 9, 2026 18:06
@serge-sans-paille serge-sans-paille merged commit 6488be7 into xtensor-stack:master Jul 9, 2026
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Thanks for fixing this one. It has been hanging around for a long time!

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SIGABRT on 32bit armhf in [batch]<xsimd::batch<float>>

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