Remove asap7/minimal design and its out-of-tree smoke test

README.md

@@ -125,13 +125,6 @@ To build from your own git repository:
     cd /home/me/myproject
     make --file=~/OpenROAD-flow-scripts/flow/Makefile DESIGN_CONFIG=somefolder/config.mk ...
 
-## Running a quick smoke-test of ORFS on your own Verilog
-
-You can [run ORFS on your own Verilog files](./flow/designs/asap7/minimal/README.md)
-without setting up a project or moving your Verilog files and even learn
-a thing or two about floorplan, placement and routing
-before you create an .sdc file and a config.mk file.
-
 ## Citing this Work
 
 If you use this software in any published work, we would appreciate a citation!

docs/user/LargeDesigns.md

@@ -6,18 +6,11 @@ ORFS has a `SYNTH_MEMORY_MAX_BITS` that limits the size of inferred memories tha
 
 Behavioral models of memories are used in simulation and FPGA tools oftentimes automatically combine hard memory macros with some extra logic to match the behavioral model. OpenROAD does not do such automatic memory inference and matching against real memories or fakemem.
 
-## Doing a screening build
+## Finding memories translated to flip flops
 
-Before deciding how to set up a flow, it is useful to do a "screening build". All we're intersted in here is to know which modules we have and their relative sizes. This can help us identify memories that have not been successfully inferred by Yosys, which will manifest itself as very long synthesis times and appear in the OpenROAD hierarchical view with a large number of instances.
-
-The [minimal build configuration](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/blob/master/flow/designs/asap7/minimal/README.md)
- can be useful to do a screening build.
-
-Options useful for a screening build are, check out [config.mk](https://github.com/The-OpenROAD-Project/OpenROAD-flow-scripts/blob/master/flow/designs/asap7/minimal/config.mk):
-
-- `SYNTH_HIERARCHICAL=1` and `SYNTH_MINIMUM_KEEP_SIZE=0`, to see all modules in the hierarchical OpenROAD view
 - `SYNTH_MEMORY_MAX_BITS=1024`, set a low threshold initially to get an error with list of memories in the system that will need to be dealt with in some way
 - `SYNTH_MOCK_LARGE_MEMORIES=1` enabled after first seeing the error report with memories. This sets the number of rows in memories larger than `SYNTH_MEMORY_MAX_BITS` to 1, so that synthesis will complete.
+- `SYNTH_HIERARCHICAL=1` and `SYNTH_MINIMUM_KEEP_SIZE=0`, to see all modules in the hierarchical OpenROAD view and spot modules with an unexpectedly large number of instances
 
 ## Next steps on memories